HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 33

no-image

HSDC-JAKIT1W2/DB

Manufacturer Part Number
HSDC-JAKIT1W2/DB
Description
DAC/ADC LATTICE KIT
Manufacturer
NXP Semiconductors
Series
-r

Specifications of HSDC-JAKIT1W2/DB

Main Purpose
Interface, ADC/DAC for Lattice ECP3 FPGA
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
ADC1413D, DAC1408D, ECP3 FPGA
Primary Attributes
Loop Back Demo with 2 High Speed Converters
Secondary Attributes
USB Powered
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6898
NXP Semiconductors
DAC1408D650
Product data sheet
10.13.1 Basic output configuration
10.13 Output configuration
The use of a differentially-coupled transformer output provides optimum distortion
performance (see
electrical isolation.
The DAC1408D650 can operate at a V
configuration, it is recommended to connect the center tap of the transformer to a 62 
resistor connected to the 3.3 V analog power supply in order to adjust the DC
common-mode to approximately 2.7 V (see
Fig 19. 1 V
Fig 20. 2 V
o(p-p)
o(p-p)
All information provided in this document is subject to legal disclaimers.
differential output with transformer
differential output with transformer
Figure
Rev. 4 — 26 November 2010
19). In addition, it helps to match the impedance and provides
IOUTnN
IOUTnP
IOUTnP/IOUTnN; V
IOUTnP/IOUTnN; V
IOUTnP
IOUTnN
0 mA to 20 mA
0 mA to 20 mA
0 mA to 20 mA
0 mA to 20 mA
o(p-p)
V
2, 4 or 8 interpolating DAC with JESD204A
DDA(3V3)
o(cm)
o(cm)
V
DDA(3V3)
Figure
V
V
of up to 2_V differential outputs. In this
DDA(3V3)
DDA(3V3)
= 2.8 V; V
= 2.7 V; V
100 Ω
100 Ω
50 Ω
50 Ω
V
20).
DDA(3V3)
2:1
o(dif)(p-p)
o(dif)(p-p)
62 Ω
4:1
001aaj817
001aaj818
50 Ω
= 1 V
= 2 V
DAC1408D650
50 Ω
© NXP B.V. 2010. All rights reserved.
33 of 98

Related parts for HSDC-JAKIT1W2/DB