HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 44

• Manufacturer Part Number: HSDC-JAKIT1W2/DB
• Description: DAC/ADC LATTICE KIT
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of HSDC-JAKIT1W2/DB

• Main Purpose: Interface, ADC/DAC for Lattice ECP3 FPGA
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: ADC1413D, DAC1408D, ECP3 FPGA
• Primary Attributes: Loop Back Demo with 2 High Speed Converters
• Secondary Attributes: USB Powered
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6898

NXP Semiconductors
Table 36.
Default settings are shown highlighted.
Table 37.
Default settings are shown highlighted.
Table 38.
Default settings are shown highlighted.
Table 39.
Default settings are shown highlighted.
Table 40.
Default settings are shown highlighted.
Table 41.
Table 42.
Default settings are shown highlighted.
Table 43.
DAC1408D650
Product data sheet
Bit
7 to 5
3 to 1
Bit
7 to 5
3 to 1
Bit
1 to 0
Bit
7 to 0
Bit
7
1 to 0
Bit
7 to 0
Bit
7
1 to 0
Bit
7 to 0
Symbol
DAC_DRV_BIAS[2:0]
DAC_SLV_BIAS[2:0]
Symbol
DAC_CK_BIAS[2:0]
DAC_CAS_BIAS[2:0]
Symbol
SEL_PH_FINE[1:0]
Symbol
PHASE_CORR[7:0]
Symbol
PHASE_CORR_ENABLE
PHASE_CORR[9:8]
Symbol
AUX_A[9:2]
Symbol
AUX_A_PD
AUX_A[1:0]
Symbol
AUX_B[9:2]
DAC_CURRENT_2 register (address 13h) bit description
DAC_CURRENT_3 register (address 14h) bit description
DAC_SEL_PH_FINE register (address 15h) bit description
PHASECORR_CNTRL0 register (address 16h) bit description
PHASECORR_CNTRL1 register (address 17h) bit description
DAC_A_AUX_MSB register (address 1Ah) bit description
DAC_A_AUX_LSB register (address 1Bh) bit description
DAC_B_AUX_MSB register (address 1Ch) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 26 November 2010
Access
R/W
R/W
Access
R/W
R/W
Access
R/W
Access
R/W
Access
R/W
R/W
Access
R/W
Access
R/W
R/W
Access
R/W
Value
3h
3h
Value
3h
3h
Value
2h
Value
00h
Value
0
1
Value
80h
Value
0
1
0h
Value
80h
0h
2, 4 or 8 interpolating DAC with JESD204A
Description
bias current control (see
bias current control (see
Description
bias current control (see
bias current control (see
Description
fine DAC phase selection
Description
LSB phase correction factor
Description
phase correction
Description
most significant 8 bits for auxiliary DAC A
Description
auxiliary DAC A power
lower 2 bits for auxiliary DAC A
Description
most significant 8 bits for auxiliary DAC B
MSB phase correction factor
disabled
enabled
on
off
DAC1408D650
Table
Table
Table
Table
46)
46)
46)
46)
© NXP B.V. 2010. All rights reserved.
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