HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 42

• Manufacturer Part Number: HSDC-JAKIT1W2/DB
• Description: DAC/ADC LATTICE KIT
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of HSDC-JAKIT1W2/DB

• Main Purpose: Interface, ADC/DAC for Lattice ECP3 FPGA
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: ADC1413D, DAC1408D, ECP3 FPGA
• Primary Attributes: Loop Back Demo with 2 High Speed Converters
• Secondary Attributes: USB Powered
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6898

NXP Semiconductors
Table 24.
Table 25.
Table 26.
Table 27.
Default settings are shown highlighted.
Table 28.
Table 29.
DAC1408D650
Product data sheet
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
Bit
7
6
5 to 0
Bit
7 to 6
5 to 0
Bit
7 to 6
5 to 0
Symbol
FREQ_NCO[31:24]
Symbol
PH_NCO[7:0]
Symbol
PH_NCO[15:8]
Symbol
DAC_A_PD
DAC_A_SLEEP
DAC_A_OFFSET[5:0]
Symbol
DAC_A_GAIN_COARSE[1:0]
DAC_A_GAIN_FINE[5:0]
Symbol
DAC_A_GAIN_COARSE[3:2]
DAC_A_OFFSET[11:6]
FREQNCO_MSB register (address 06h) bit description
PHINCO_LSB register (address 07h) bit description
PHINCO_MSB register (address 08h) bit description
DAC_A_CFG_1 register (address 09h) bit description
DAC_A_CFG_2 register (address 0Ah) bit description
DAC_A_CFG_3 register (address 0Bh) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 26 November 2010
Access
R/W
Access
R/W
Access
R/W
Access
R/W
R/W
R/W
Access
R/W
R/W
Access
R/W
R/W
Value
26h
Value
00h
Value
00h
Value
0
1
0
1
00h
Value
1h
00h
Value
3h
00h
2, 4 or 8 interpolating DAC with JESD204A
Description
most significant 8 bits for the NCO frequency setting
Description
lower 8 bits for the NCO phase setting
Description
most significant 8 bits for the NCO phase setting
Description
DAC A power
DAC A Sleep mode
lower 6 bits for the DAC A offset
Description
least significant 2 bits for the DAC A gain setting for
coarse adjustment
the 6 bits for the DAC A gain setting for fine
adjustment
Description
most significant 2 bits for the DAC A gain setting for
coarse adjustment
most significant 6 bits for the DAC A offset
on
off
disabled
enabled
DAC1408D650
© NXP B.V. 2010. All rights reserved.
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