HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 88

• Manufacturer Part Number: HSDC-JAKIT1W2/DB
• Description: DAC/ADC LATTICE KIT
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of HSDC-JAKIT1W2/DB

• Main Purpose: Interface, ADC/DAC for Lattice ECP3 FPGA
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: ADC1413D, DAC1408D, ECP3 FPGA
• Primary Attributes: Loop Back Demo with 2 High Speed Converters
• Secondary Attributes: USB Powered
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6898

NXP Semiconductors
Table 199. LN3_CFG_11 register (address 1Bh) bit description
Default settings are shown highlighted.
Table 200. LN3_CFG_12 register (address 1Ch) bit description
Default settings are shown highlighted.
Table 201. LN3_CFG_13 register (address 1Dh) bit description
Default settings are shown highlighted.
Table 202. PAGE_ADDRESS register (address 1Fh) bit description
Default settings are shown highlighted.
DAC1408D650
Product data sheet
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
Bit
2 to 0
Symbol
LN3_RES1[7:0]
Symbol
LN3_RES2[7:0]
Symbol
LN3_FCHK[7:0]
Symbol
PAGE[2:0]
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 26 November 2010
Access
R
Access
R
Access
R
Access
R/W
Value
-
Value
-
Value
Value
0h
-
2, 4 or 8 interpolating DAC with JESD204A
Description
lane 3 reserved field
Description
lane 3 reserved field
Description
Description
page_address
lane 3 checksum
DAC1408D650
© NXP B.V. 2010. All rights reserved.
88 of 98