DSPD56367PV150 Freescale Semiconductor, DSPD56367PV150 Datasheet - Page 21

no-image

DSPD56367PV150

Manufacturer Part Number
DSPD56367PV150
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of DSPD56367PV150

Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
150MHz
Mips
150
Device Input Clock Speed
150MHz
Ram Size
69KB
Program Memory Size
120KB
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (min)
1.71/3.14V
Operating Supply Voltage (max)
1.89/3.46V
Operating Temp Range
-40C to 95C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPD56367PV150
Manufacturer:
MOT
Quantity:
60
Part Number:
DSPD56367PV150K41R
Manufacturer:
DSP
Quantity:
59
Freescale Semiconductor
SCKR_1
SCKT_1
SDO5_1
SDO4_1
SDI0_1
SDI1_1
Signal
Name
PE0
PE3
PE6
PE7
Input, Output, or
Input, Output, or
Input, Output, or
Input, Output, or
Input or Output
Input or Output
Disconnected
Disconnected
Disconnected
Disconnected
Signal Type
Output
Output
Input
Input
Table 2-12 Enhanced Serial Audio Interface_1 Signals (continued)
Disconnected
Disconnected
Disconnected
Disconnected
State during
Reset
GPIO
GPIO
GPIO
GPIO
DSP56367 Technical Data, Rev. 2.1
Receiver Serial Clock_1—SCKR provides the receiver serial bit clock for the
ESAI. The SCKR operates as a clock input or output used by all the enabled
receivers in the asynchronous mode (SYN=0), or as serial flag 0 pin in the
synchronous mode (SYN=1).
When this pin is configured as serial flag pin, its direction is determined by the
RCKD bit in the RCCR register. When configured as the output flag OF0, this
pin will reflect the value of the OF0 bit in the SAICR register, and the data in
the OF0 bit will show up at the pin synchronized to the frame sync in normal
mode or the slot in network mode. When configured as the input flag IF0, the
data value at the pin will be stored in the IF0 bit in the SAISR register,
synchronized by the frame sync in normal mode or the slot in network mode.
Port E 0—When the ESAI is configured as GPIO, this signal is individually
programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input cannot tolerate 3.3V.
Transmitter Serial Clock_1—This signal provides the serial bit rate clock for
the ESAI. SCKT is a clock input or output used by all enabled transmitters and
receivers in synchronous mode, or by all enabled transmitters in
asynchronous mode.
Port E 3—When the ESAI is configured as GPIO, this signal is individually
programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input cannot tolerate 3.3V.
Serial Data Output 5_1—When programmed as a transmitter, SDO5 is used
to transmit data from the TX5 serial transmit shift register.
Serial Data Input 0_1—When programmed as a receiver, SDI0 is used to
receive serial data into the RX0 serial receive shift register.
Port E 6—When the ESAI is configured as GPIO, this signal is individually
programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input cannot tolerate 3.3V.
Serial Data Output 4_1—When programmed as a transmitter, SDO4 is used
to transmit data from the TX4 serial transmit shift register.
Serial Data Input 1_1—When programmed as a receiver, SDI1 is used to
receive serial data into the RX1 serial receive shift register.
Port E 7—When the ESAI is configured as GPIO, this signal is individually
programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input is 3.3V tolerant.
Signal Description
Enhanced Serial Audio Interface_1
2-17

Related parts for DSPD56367PV150