DSPD56367PV150 Freescale Semiconductor, DSPD56367PV150 Datasheet - Page 71

• Manufacturer Part Number: DSPD56367PV150
• Manufacturer: Freescale Semiconductor

Specifications of DSPD56367PV150

• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 150MHz
• Mips: 150
• Device Input Clock Speed: 150MHz
• Ram Size: 69KB
• Program Memory Size: 120KB
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (min): 1.71/3.14V
• Operating Supply Voltage (max): 1.89/3.46V
• Operating Temp Range: -40C to 95C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / Rohs Status: Not Compliant

1
2
3
4
5
6
7
Freescale Semiconductor
No.
454 TXC rising edge to data out valid
455 TXC rising edge to data out high impedance
456 TXC rising edge to transmitter #0 drive enable
457 FST input (bl, wr) setup time before TXC falling
458 FST input (wl) to data out enable from high
459 FST input (wl) to transmitter #0 drive enable
460 FST input (wl) setup time before TXC falling edge
461 FST input hold time after TXC falling edge
462 Flag output valid after TXC rising edge
463 HCKR/HCKT clock cycle
464 HCKT input rising edge to TXC output
465 HCKR input rising edge to RXC output
The timing values calculated are based on simulation data at 150MHz. Tester restrictions limit ESAI testing to lower clock
frequencies.
ESAI_1 specs match those of ESAI_0.
V
i ck = internal clock
x ck = external clock
i ck a = internal clock, asynchronous mode (asynchronous implies that TXC and RXC are two different clocks)
i ck s = internal clock, synchronous mode (synchronous implies that TXC and RXC are the same clock)
bl = bit length
wl = word length
wr = word length relative
TXC(SCKT pin) = transmit clock
RXC(SCKR pin) = receive clock
FST(FST pin) = transmit frame sync
FSR(FSR pin) = receive frame sync
HCKT(HCKT pin) = transmit high frequency clock
HCKR(HCKR pin) = receive high frequency clock
For the internal clock, the external clock cycle is defined by Icyc and the ESAI control register.
CC
= 1.8 V ± 5%; T
deassertion
edge
impedance
assertion
8
9
Characteristics
J
Table 3-19 Enhanced Serial Audio Interface Timing
= –40°C to +95°C, C
3, 4, 5
DSP56367 Technical Data, Rev. 2.1
L
= 50 pF
9
Symbol
—
—
—
—
—
—
—
—
—
—
—
—
23 + 0.5 × T C
Expression
21.0
—
—
—
—
—
—
—
—
—
—
—
Enhanced Serial Audio Interface Timing
1, 2
(continued)
21.0
21.0
40.0
Min
2.0
2.0
4.0
0.0
—
—
—
—
—
—
—
—
—
—
—
—
Max
26.5
21.0
31.0
16.0
34.0
20.0
27.0
31.0
32.0
18.0
27.5
27.5
—
—
—
—
—
—
—
Condition
x ck
x ck
x ck
x ck
x ck
x ck
x ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
—
—
6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3-47