DSPD56367PV150 Freescale Semiconductor, DSPD56367PV150 Datasheet - Page 47

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DSPD56367PV150

Manufacturer Part Number
DSPD56367PV150
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of DSPD56367PV150

Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
150MHz
Mips
150
Device Input Clock Speed
150MHz
Ram Size
69KB
Program Memory Size
120KB
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (min)
1.71/3.14V
Operating Supply Voltage (max)
1.89/3.46V
Operating Temp Range
-40C to 95C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPD56367PV150
Manufacturer:
MOT
Quantity:
60
Part Number:
DSPD56367PV150K41R
Manufacturer:
DSP
Quantity:
59
Freescale Semiconductor
1
2
3
4
191
192
193
194
195
No.
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
No.
The number of wait states for out of page access is specified in the DCR.
The refresh period is specified in the DCR.
Reduced DSP clock speed allows use of DRAM out-of-page access with four Wait states (
RD deassertion will always occur after CAS deassertion; therefore, the restricted timing is t
RD assertion to RAS deassertion
RD assertion to data valid
RD deassertion to data not valid
WR assertion to data active
WR deassertion to data high impedance
Random read or write cycle time
RAS assertion to data valid (read)
CAS assertion to data valid (read)
Column address valid to data valid (read)
CAS deassertion to data not valid (read hold time)
RAS deassertion to RAS assertion
RAS assertion pulse width
CAS assertion to RAS deassertion
RAS assertion to CAS deassertion
CAS assertion pulse width
RAS assertion to CAS assertion
RAS assertion to column address valid
CAS deassertion to RAS assertion
CAS deassertion pulse width
Row address valid to RAS assertion
RAS assertion to row address not valid
Table 3-11 DRAM Out-of-Page and Refresh Timings, Four Wait States
Table 3-12 DRAM Out-of-Page and Refresh Timings, Eleven Wait States
Characteristics
Characteristics
4
DSP56367 Technical Data, Rev. 2.1
Symbol
t
ROH
t
t
GA
GZ
0.75 × T
4.5 × T
Expression
4 × T
Symbol
0.25 × T
t
t
t
t
t
t
t
t
t
t
t
t
t
RAC
CAC
t
t
RAS
RSH
CSH
CAS
RCD
RAD
CRP
t
ASR
RAH
OFF
RC
AA
RP
CP
C
C
C
− 7.5
− 4.0
− 0.3
C
6.25 × T
3.75 × T
4.25 × T
7.75 × T
5.25 × T
6.25 × T
3.75 × T
1.75 × T
5.75 × T
4.25 × T
4.25 × T
1.75 × T
4.5 × T
2.5 × T
External Memory Expansion Port (Port A)
Expression
221.0
12 × T
37.2
Min
0.0
20 MHz
C
C
C
C
C
C
C
C
C
C
C
C
C
C
− 7.0
± 4.0
C
− 7.0
− 7.0
− 4.0
− 4.0
− 4.0
− 4.0
− 4.0
± 4.0
− 4.0
− 4.0
− 4.0
− 4.0
Figure 3-14
OFF
192.5
Max
12.5
3
1, 2
and not t
(continued)
120.0
38.5
73.5
48.5
58.5
33.5
21.0
13.5
53.5
38.5
38.5
13.5
Min
146.0
0.0
24.7
Min
1, 2, 3
0.0
100 MHz
30 MHz
GZ
).
.
Max
55.5
30.5
38.0
29.0
21.5
125.8
Max
8.3
3
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3-23

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