DSPD56367PV150 Freescale Semiconductor, DSPD56367PV150 Datasheet - Page 4

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DSPD56367PV150

Manufacturer Part Number
DSPD56367PV150
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of DSPD56367PV150

Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
150MHz
Mips
150
Device Input Clock Speed
150MHz
Ram Size
69KB
Program Memory Size
120KB
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (min)
1.71/3.14V
Operating Supply Voltage (max)
1.89/3.46V
Operating Temp Range
-40C to 95C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPD56367PV150
Manufacturer:
MOT
Quantity:
60
Part Number:
DSPD56367PV150K41R
Manufacturer:
DSP
Quantity:
59
Overview
1.6
1.7
Table 1-1
design properly with the part. Documentation is available from a local Freescale distributor, a Freescale
semiconductor sales office, a Freescale Literature Distribution Center, or through the Freescale DSP home
page on the Internet (the source for the latest information).
1-4
DSP56300 Family Manual
DSP56367 Product Brief
DSP56367 User’s Manual
DSP56367 Technical Data Sheet
(this document)
IBIS Model
Serial Audio Interface I(ESAI_1): up to 4 receivers and up to 6 transmitters, master or slave. I
Sony, AC97, network and other programmable protocols
The ESAI_1 shares four of the data pins with ESAI, and ESAI_1 does NOT support HCKR and
HCKT (high frequency clocks)
Serial Host Interface (SHI): SPI and I
support for 8, 16 and 24-bit words.
Byte-wide parallel Host Interface (HDI08) with DMA support.
Triple Timer module (TEC).
Digital Audio Transmitter (DAX): 1 serial transmitter capable of supporting the SPDIF, IEC958,
CP-340 and AES/EBU digital audio formats.
Pins of unused peripherals (except SHI) may be programmed as GPIO lines.
144-pin plastic LQFP package
Documentation
lists the documents that provide a complete description of the DSP56367 and are required to
Document Name
Table 1-1
DSP56367 Technical Data, Rev. 2.1
Detailed description of the 56000-family architecture
and the 24-bit core processor and instruction set
DSP56367 User’s Manual
Electrical and timing specifications; pin and package
descriptions
Input Output Buffer Information Specification
Brief description of the chip
2
DSP56367 Documentation
C protocols, multi master capability, 10-word receive FIFO,
Description
For software or simulation
go to www.freescale.com.
models, contact sales or
Freescale Semiconductor
Order Number
DSP56367UM
DSP56300FM
DSP56367P
DSP56367
2
S,

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