LPC1857FET256,551 NXP Semiconductors, LPC1857FET256,551 Datasheet - Page 207
LPC1857FET256,551
Manufacturer Part Number
LPC1857FET256,551
Description
IC MCU 32BIT 1MB FLASH 256LBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1857FET256,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Part Number:
LPC1857FET256,551
Manufacturer:
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User manual
Table 113. Pins controlled by the ENAIO0 register
By default, all pins are connected to their digital function 0 and the corresponding ENAIO0
register bit is set to one. In this case, only the digital pad is available.
Before selecting the analog pad by setting the ENAIO0 register bit to zero, the digital pad
must be set as follows using the corresponding SFSP register:
Table 114. ADC0 function select register (ENAIO0, address 0x4008 6C88) bit description
Pin
P4_3
P4_1
PF_8
P7_5
P7_4
PF_10
PB_6
Bit
0
1
2
3
4
5
1. Tri-state the output driver by selecting an input at the pinmux e.g. GPIO function in
2. Disable the receiver by setting the EZI bit to zero (see
3. Disable the pull-up resistor by setting the EPUN bit to one, and disable the pull-down
input mode.
the default setting.
resistor by setting the EPD bit to zero.
Symbol
ADC0_0
ADC0_1
ADC0_2
ADC0_3
ADC0_4
ADC0_5
All information provided in this document is subject to legal disclaimers.
Value Description
0
1
0
1
0
1
0
1
0
1
0
1
Rev. 00.13 — 20 July 2011
Select ADC0_0
Analog function ADC0_0 selected on pin P4_3.
Digital function selected on pin P4_3.
Select ADC0_1
Analog function ADC0_1 selected on pin P4_1.
Digital function selected on pin P4_1.
Select ADC0_2
Analog function ADC0_2 selected on pin PF_8.
Digital function selected on pin PF_8.
Select ADC0_3
Analog function ADC0_3 selected on pin P7_5.
Digital function selected on pin P7_5.
Select ADC0_4
Analog function ADC0_4 selected on pin P7_4.
Digital function selected on pin P7_4.
Select ADC0_5
Analog function ADC0_5 selected on pin PF_10.
Digital function selected on pin PF_10.
ADC function
ADC0_0
ADC0_1
ADC0_2
ADC0_3
ADC0_4
ADC0_5
ADC0_6
Chapter 13: LPC18xx System Control Unit (SCU)
Table 111
ENAIO0 register bit
0
1
2
3
4
5
6
or
UM10430
Table
© NXP B.V. 2011. All rights reserved.
Reset
value
0
0
0
0
0
0
112). This is
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Access
R/W
R/W
R/W
R/W
R/W
R/W
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