LPC1857FET256,551 NXP Semiconductors, LPC1857FET256,551 Datasheet - Page 588
LPC1857FET256,551
Manufacturer Part Number
LPC1857FET256,551
Description
IC MCU 32BIT 1MB FLASH 256LBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1857FET256,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1857FET256,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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24.4 General description
<Document ID>
User manual
The State Configurable Timer (SCT) allows a wide variety of timing, counting, output
modulation, and input capture operations.
The most basic user-programmable option is whether a SCT operates as two 16-bit
counters or a unified 32-bit counter. In the two-counter case, in addition to the counter
value the following operational elements are independent for each half:
In the two-counter case, the following operational elements are global to the SCT, but
events, outputs, interrupts, and DMA requests can use match conditions from either
counter:
Remark: This document uses the term “bus error” to indicate a SCT response that makes
the processor take an exception.
CLK_M3_SCT
Fig 62. SCT block diagram
•
•
•
•
•
•
•
•
•
– 32 states
State variable
Limit, halt, stop, and start conditions
Values of Match/Capture registers, plus reload or capture control values
Clock selection
Inputs
Events
Outputs
Interrupts
DMA requests
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
prescaler(s)
SCT clock
Chapter 24: LPC18xx State Configurable Timer (SCT)
UM10430
© NXP B.V. 2011. All rights reserved.
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