LPC1857FET256,551 NXP Semiconductors, LPC1857FET256,551 Datasheet - Page 73
LPC1857FET256,551
Manufacturer Part Number
LPC1857FET256,551
Description
IC MCU 32BIT 1MB FLASH 256LBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1857FET256,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1857FET256,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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User manual
9.6.1 Frequency monitor register
Table 48.
The CGU can report the relative frequency of any operating clock. The clock to be
measured must be selected by software, while the fixed-frequency IRC clock fref is used
as the reference frequency. A 14-bit counter then counts the number of cycles of the
measured clock that occur during a user-defined number of reference-clock cycles. When
the MEAS bit is set, the measured-clock counter is reset to 0 and counts up, while the
9-bit reference-clock counter is loaded with the value in RCNT and then counts down
towards 0. When either counter reaches its terminal value both counters are disabled and
the MEAS bit is reset to 0. The current values of the counters can then be read out and
the selected frequency obtained by the following equation:
If RCNT is programmed to a value equal to the core clock frequency in kHz and reaches 0
before the FCNT counter saturates, the value stored in FCNT would then show the
measured clock’s frequency in kHz without the need for any further calculation.
Note that the accuracy of this measurement can be affected by several factors:
Name
OUTCLK_20_CTRL
OUTCLK_21_CTRL
to
OUTCLK_24_CTRL
OUTCLK_25_CTRL
OUTCLK_26_CTRL
OUTCLK_27_CTRL
1. Quantization error is noticeable if the ratio between the two clocks is large (e.g. 100
2. Due to synchronization, the counters are not started and stopped at exactly the same
3. The measured frequency can only be to the same level of precision as the reference
kHz vs. 1 kHz), because one counter saturates while the other still has only a small
count value.
time.
frequency.
Register overview: CGU (base address 0x4005 0000)
All information provided in this document is subject to legal disclaimers.
fselected
Access Address
R/W
R/W
R/W
R/W
R/W
Rev. 00.13 — 20 July 2011
=
offset
0x0AC
0x0B0 to
0x0BC
0x0C0
0x0C4
0x0C8
------------------------------------------------------------------------- -
Qref initial
Chapter 9: LPC18xx Clock Generation Unit (CGU)
Description
Output stage 20 control register for
base clock BASE_OUT_CLK
Reserved output stages
Output stage 25 control register for
base clock BASE_APLL_CLK
Output stage 26 control register for
base clock
BASE_CGU_OUT0_CLK
Output stage 27 control register for
base clock
BASE_CGU_OUT1_CLK
Qselected
Qref final
–
fref
UM10430
© NXP B.V. 2011. All rights reserved.
Reset value
0x0100 0000
-
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