LPC1857FET256,551 NXP Semiconductors, LPC1857FET256,551 Datasheet - Page 460
LPC1857FET256,551
Manufacturer Part Number
LPC1857FET256,551
Description
IC MCU 32BIT 1MB FLASH 256LBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1857FET256,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Table 386. USB endpoint NAK register in device mode (ENDPTNAK - address 0x4000 7178) bit description
<Document ID>
User manual
Bit
3:0
15:6
19:16 EPTN
31:20 -
Symbol
EPRN
-
21.6.13.2 Host mode
21.6.14.1 Device mode
21.6.14 USB Endpoint NAK Enable register (ENDPTNAKEN)
This register is not used in host mode.
Each bit in this register enables the corresponding bit in the ENDPTNAK register. Each Tx
and Rx endpoint has a bit in the EPTNE and EPRNE field respectively.
Description
Rx endpoint NAK
Each RX endpoint has one bit in this field. The bit is set when the device
sends a NAK handshake on a received OUT or PING token for the
corresponding endpoint.
Bit 3 corresponds to endpoint 3.
...
Bit 1 corresponds to endpoint 1.
Bit 0 corresponds to endpoint 0.
Reserved
Tx endpoint NAK
Each TX endpoint has one bit in this field. The bit is set when the device
sends a NAK handshake on a received IN token for the corresponding
endpoint.
Bit 3 corresponds to endpoint 3.
...
Bit 1 corresponds to endpoint 1.
Bit 0 corresponds to endpoint 0.
Reserved
All information provided in this document is subject to legal disclaimers.
Rev. 00.13 — 20 July 2011
Chapter 21: LPC18xx USB1 Host/Device controller
UM10430
© NXP B.V. 2011. All rights reserved.
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