ADUC7023 Analog Devices, ADUC7023 Datasheet - Page 26

• Manufacturer Part Number: ADUC7023
• Description: Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU
• Manufacturer: Analog Devices

Specifications of ADUC7023

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 40
• Sram (bytes): 8192Bytes
• Gpio Pins: 20
• Adc # Channels: 12
• Other: PWM

ADuC7023
Address
0x0914
0x0918
0x091C
0x0924
0x0928
0x092C
0x0930
0x0934
0x0938
0x093C
0x0940
0x0944
0x0948
0x094C
Table 19. SPI Base Address = 0xFFFF0A00
Address
0x0A00
0x0A04
0x0A08
0x0A0C
0x0A10
Table 20. PLA Base Address = 0XFFFF0B00
Address
0x0B00
0x0B04
0x0B08
0x0B0C
0x0B10
0x0B14
0x0B18
0x0B1C
0x0B20
0x0B24
0x0B28
0x0B2C
0x0B30
0x0B34
0x0B38
0x0B3C
0x0B40
0x0B44
0x0B48
0x0B4C
0x0B50
0x0B54
Name
I2C1MCNT1
I2C1ADR0
I2C1ADR1
I2C1DIV
I2C1SCON
I2C1SSTA
I2C1SRX
I2C1STX
I2C1ALT
I2C1ID0
I2C1ID1
I2C1ID2
I2C1ID3
I2C1FSTA
Name
PLAELM0
PLAELM1
PLAELM2
PLAELM3
PLAELM4
PLAELM5
PLAELM6
PLAELM7
PLAELM8
PLAELM9
PLAELM10
PLAELM11
PLAELM12
PLAELM13
PLAELM14
PLAELM15
PLACLK
PLAIRQ
PLAADC
PLADIN
PLADOUT
PLALCK
Name
SPISTA
SPIRX
SPITX
SPIDIV
SPICON
Byte
1
1
1
2
2
2
1
1
1
1
1
1
1
2
Access Type
R
R/W
R/W
R/W
R/W
R/W
R
W
R/W
R/W
R/W
R/W
R/W
R/W
2
1
1
1
2
Byte
2
2
2
2
2
2
2
2
2
2
Byte
2
2
2
2
2
2
1
4
4
4
4
1
Access Type
R
R
W
R/W
R/W
Access Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
W
Default Value
0x00
0x00
0x00
0x1F1F
0x0000
0x0000
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x0000
Rev. B | Page 26 of 96
Default Value
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x00
0x00000000
0x00000000
0x00000000
0x00000000
0x00
I
number of bytes already received during a read from slave sequence.
I
prior to communications.
I
prior to communications. Used in 10-bit mode only.
I
I
I
I
I
I
I
I
I
I
I
Description
2
2
2
2
2
2
2
2
2
2
2
2
2
2
C1 master current read count register. This register contains the
C1 address byte register. Write the required slave address in here
C1 address byte register. Write the required slave address in here
C1 clock control register. Used to configure the SCLK frequency.
C1 slave control register.
C1 slave status register.
C1 slave receive register.
C1 slave transmit register.
C1 hardware general call recognition register.
C1 slave ID0 register. Slave bus ID register.
C1 slave ID1 register. Slave bus ID register.
C1 slave ID2 register. Slave bus ID register.
C1 slave ID3 register. Slave bus ID register.
C1 FIFO status register. Used in both master and slave modes.
Default Value
0x0000
0x00
0xXX
0x00
0x0000
Description
PLA Element 0 control register.
PLA Element 1 control register.
PLA Element 2 control register.
PLA Element 3 control register.
PLA Element 4 control register.
PLA Element 5 control register.
PLA Element 6 control register.
PLA Element 7 control register.
PLA Element 8 control register.
PLA Element 9 control register.
PLA Element 10 control register.
PLA Element 11 control register.
PLA Element 12 control register.
PLA Element 13 control register.
PLA Element 14 control register.
PLA Element 15 control register.
PLA clock select register.
PLA interrupt control register.
PLA ADC trigger control register.
PLA data in register.
PLA data out register.
PLA lock register.
SPI status MMR.
SPI receive MMR.
SPI transmit MMR.
SPI baud rate select MMR.
SPI control MMR.
Description