ADUC7023 Analog Devices, ADUC7023 Datasheet - Page 50

• Manufacturer Part Number: ADUC7023
• Description: Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU
• Manufacturer: Analog Devices

Specifications of ADUC7023

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 40
• Sram (bytes): 8192Bytes
• Gpio Pins: 20
• Adc # Channels: 12
• Other: PWM

ADuC7023
DIGITAL PERIPHERALS
GENERAL-PURPOSE INPUT/OUTPUT
The ADuC7023 provides up to 20 general-purpose, bidirectional
I/O (GPIO) pins. All I/O pins are 5 V tolerant, meaning the GPIOs
support an input voltage of 5 V. In general, many of the GPIO
pins have multiple functions (see Table 54 for the pin function
definitions). By default, the GPIO pins are configured in GPIO mode.
All GPIO pins have an internal pull-up resistor (of about 100 kΩ)
and their drive capability is 1.6 mA. Note that a maximum of
20 GPIOs can drive 1.6 mA at the same time. Using the GPxPAR
registers, it is possible to enable/disable the pull-up resistors.
The 20 GPIOs are grouped in three ports, Port 0 to Port 2 (Port x).
Each port is controlled by four or five MMRs.
The input level of any GPIO can be read at any time in the
GPxDAT MMR, even when the pin is configured in a mode other
than GPIO. The PLA input is always active.
When the ADuC7023 part enters a power-saving mode, the GPIO
pins retain their state. Also note, that by setting RSTCFG bit 0, the
GPIO pins can retain their state during a watchdog or software
reset.
Table 54. GPIO Pin Function Descriptions
Port
0
1
2
1
2
3
4
These pins should not be used by user code when debugging the part via
I
When configured in Mode 2, P1.2 is ECLK by default, or core clock output. To
I
JTAG. See Table 30 and the Remap register for further details on how to
configure these pins for GPIO mode. The default value of these pins depends
on the level of the P0.0/BM pin during the last reset sequence.
configure it as a clock input, the MDCLK bits in PLLCON must be set to 11.
2
2
C1 function is only available on the 32-lead package.
C1 function is only available on the 40-lead package.
Pin
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.0
P2.2
P2.3
P2.4
1
1
1
3
00
GPIO/BM
GPIO
GPIO
GPIO
GPIO/IRQ0
GPIO
GPIO
GPIO
GPIO
GPIO/IRQ1
GPIO/IRQ2
GPIO/IRQ3
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
01
nTRST
TDO
TDI
TCK
SCL0
SDA0
MISO
MOSI
SCLK
SS
ADC4
ADC5
ADC10
ADC6
SCL1
SDA1
ADC12
ADC7
ADC8
ADC9
Configuration
4
4
10
ADC
CONV
COMP
SCL1
SDA1
PWM0
PWM1
ECLK
PWM
PWM2
PWM3
PWM4
PWMsync
BUSY
2
TRIPINPUT
2
START
OUT
11
PLAI[8]
PLAI[9]
PLAO[8]
PLAO[9]
PLAI[0]
PLAI[1]
PLAI[2]
PLAO[0]
PLAO[1]
PLAO[2]
PLAI[3]
PLAI[4]
PLAO[3]
PLAO[4]
PLAI[5]
PLAI[6]
PLAI[7]
PLAO[6]
PLAO[7]
PLAI[10]
Rev. B | Page 50 of 96
GPxCON Registers
Name
GP0CON
GP1CON
GP2CON
GPxCON are the Port x control registers, which select the
function of each pin of Port x as described in Table 55.
Table 55. GPxCON MMR Bit Descriptions
Bit
31 to 30
29 to 28
27 to 26
25 to 24
23 to 22
21 to 20
19 to 18
17 to 16
15 to 14
13 to 12
11 to 10
9 to 8
7 to 6
5 to 4
3 to 2
1 to 0
GP0PAR Register
Name
Address
Default value
Access
Function
GP1PAR Register
Name
Address
Default value
Access
Function
Description
Reserved.
Select function of Px.7 pin.
Reserved.
Select function of Px.6 pin.
Reserved.
Select function of Px.5 pin.
Reserved.
Select function of Px.4 pin.
Reserved.
Select function of Px.3 pin.
Reserved.
Select function of Px.2 pin.
Reserved.
Select function of Px.1 pin.
Reserved.
Select function of Px.0 pin.
Address
0xFFFFF400
0xFFFFF404
0xFFFFF408
GP1PAR
0xFFFFF43C
0x22000022
Read/write
GP1PAR programs the parameters for Port 0,
Port 1, and Port 2. Note that the GP1DAT
MMR must always be written after changing
the GP1PAR MMR.
0x22220000
GP0PAR
0xFFFFF42C
Read/write
GP0PAR programs the parameters for Port 0,
Port 1, and Port 2. Note that the GP0DAT
MMR must always be written after changing
the GP0PAR MMR.
Default Value
0x00001111
0x00000000
0x00000000
Access
R/W
R/W
R/W