ADUC7023 Analog Devices, ADUC7023 Datasheet - Page 29

• Manufacturer Part Number: ADUC7023
• Description: Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU
• Manufacturer: Analog Devices

Specifications of ADUC7023

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 40
• Sram (bytes): 8192Bytes
• Gpio Pins: 20
• Adc # Channels: 12
• Other: PWM

TYPICAL OPERATION
When configured via the ADC control and channel selection
registers, the ADC converts the analog input and provides a
12-bit result in the ADC data register.
The top four bits are the sign bits. The 12-bit result is placed
from Bit 16 to Bit 27 as shown in Figure 21. Note that in fully
differential mode, the result is represented in twos complement
format. In pseudo differential and single-ended modes, the
result is represented in straight binary format.
The same format is used in DACxDAT, simplifying the software.
Current Consumption
The ADC in standby mode, that is, powered up but not
converting, typically consumes 640 μA. The internal reference
adds 140 μA. During conversion, the extra current is 0.3 μA
multiplied by the sampling frequency (in kHz).
Timing
Figure 22 gives details of the ADC timing. Users control the
ADC clock speed and the number of acquisition clocks in the
ADCCON MMR. By default, the acquisition time is eight
clocks, and the clock divider is two. The number of extra clocks
(such as bit trial or write) is set to 19, which gives a sampling
rate of 774 kSPS. For conversion on the temperature sensor, set
ADCCON = 0x37A3. When using multiple channels including
the temperature sensor, the timing settings revert to the user-
defined settings after reading the temperature sensor channel.
Table 24. ADCCON MMR Bit Designations
Bit
15 to 14
13
12 to 10
9 to 8
31
SIGN BITS
27
Figure 21. ADC Result Format
Value
000
001
010
011
100
101
00
01
10
11
12-BIT ADC RESULT
Description
Reserved.
Temperature sensor conversion enable. Set to 1 for temperature sensor conversions. Set to 0 for
normal ADC conversions.
ADC clock speed.
f
f
f
f
f
f
ADC acquisition time.
2 clocks.
4 clocks.
8 clocks (default value).
16 clocks.
ADC
ADC
ADC
ADC
ADC
ADC
/1. This divider is provided to obtain 1 MSPS ADC with an external clock <41.78 MHz.
/2 (default value).
/4.
/8.
/16.
/32.
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MMR INTERFACE
The ADC is controlled and configured via the eight MMRs
described in this section.
ADCCON Register
Name:
Address:
Default value:
Access:
Function:
ADC CLOCK
CONV
ADC
ADCDAT
START
BUSY
ADCCON
0xFFFF0500
0x0600
Read/write
ADCCON is an ADC control register
that allows the programmer to enable the
ADC peripheral, select the mode of
operation of the ADC (either in single-
ended mode, pseudo differential mode, or
fully differential mode), and select the
conversion type. This MMR is described
in Table 24.
Figure 22. ADC Timing
ACQ
BIT TRIAL
ADCSTA = 0
WRITE
ADC INTERRUPT
DATA
ADuC7023
ADCSTA = 1