ST7232AK2-Auto STMicroelectronics, ST7232AK2-Auto Datasheet - Page 140
ST7232AK2-Auto
Manufacturer Part Number
ST7232AK2-Auto
Description
8-bit MCU for automotive, 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
Manufacturer
STMicroelectronics
Datasheet
1.ST7232AK2-AUTO.pdf
(201 pages)
Specifications of ST7232AK2-Auto
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and bypass for external clock
Four Power Saving Modes
halt, active halt, wait and slow
Main Clock Controller With
real time base, beep and clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, PWM and pulse generator modes
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On-chip peripherals
10.6.3
Note:
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Functional description
The conversion is monotonic, meaning that the result never decreases if the analog input
does not decrease and never increases if the analog input does not increase.
If the input voltage (V
conversion result is FFh in the ADCDRH register and 03h in the ADCDRL register (without
overflow indication).
If the input voltage (V
conversion result in the ADCDRH and ADCDRL registers is 00 00h.
The A/D converter is linear and the digital result of the conversion is stored in the ADCDRH
and ADCDRL registers. The accuracy of the conversion is described in
Electrical
R
is too high, this results in a loss of accuracy due to leakage and sampling not being
completed in the alloted time.
A/D converter configuration
The analog input ports must be configured as input, no pull-up, no interrupt. Refer to
Section 9: I/O
to be read as a logic input.
In the ADCCSR register select the CS[3:0] bits to assign the analog channel to convert.
Starting the conversion
In the ADCCSR register set the ADON bit to enable the A/D converter and to start the
conversion. From this time on, the ADC performs a continuous conversion of the selected
channel.
When a conversion is complete:
●
●
A read to the ADCDRH or a write to any bit of the ADCCSR register resets the EOC bit.
To read the 10 bits, perform the following steps:
1.
2.
3.
The data is not latched, so both the low and the high data register must be read before the
next conversion is complete, so it is recommended to disable interrupts while reading the
conversion result.
To read only 8 bits, perform the following steps:
1.
2.
AIN
The EOC bit is set by hardware
The result is in the ADCDR register
Poll the EOC bit
Read the ADCDRL register
Read the ADCDRH register. This clears EOC automatically
Poll the EOC bit
Read the ADCDRH register. This clears EOC automatically
is the maximum recommended impedance for an analog input signal. If the impedance
characteristics.
ports. Using these pins as analog inputs does not affect the ability of the port
AIN
AIN
) is greater than V
) is lower than V
SSA
AREF
(low-level voltage reference) then the
(high-level voltage reference) then the
Section 12:
ST7232Axx-Auto
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