ST7232AK2-Auto STMicroelectronics, ST7232AK2-Auto Datasheet - Page 15

• Manufacturer Part Number: ST7232AK2-Auto
• Description: 8-bit MCU for automotive, 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
• Manufacturer: STMicroelectronics

Specifications of ST7232AK2-Auto

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators and bypass for external clock
• Four Power Saving Modes: halt, active halt, wait and slow
• Main Clock Controller With: real time base, beep and clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, PWM and pulse generator modes

ST7232Axx-Auto
1.2
1.2.1
Differences between ST7232A-Auto and ST7232A datasheets
The differences between the ST7232A-Auto datasheet, version 1, released in January 2008
and the ST7232A datasheet, version 2, released in December 2005 are listed below.
Differences are categorised as follows:
●
●
●
Principal differences
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
Principal differences
Minor content differences
Editing and formatting differences
Changed root part number from ST7232A to ST7232AK1-Auto, ST7232AK2-Auto,
ST7232AJ1-Auto, and ST7232AJ2-Auto throughout document
Changed document title
Removed 1 and 5 suffix version temperatures ranges throughout the document
Features on page
and changed the condition to T
Table 2: Device pin description on page
Section 6.3: Phase locked loop (PLL) on page
with an external clock
Reset vector fetch on page
programmed
Section 9.2.1: Input modes on page
Section 9.3: I/O port implementation on page
tables
Output compare on page
Figure 41: Output compare timing diagram, fTIMER = fCPU/4 on page
compare register i Latch from diagram
Section 10.6: 10-bit A/D converter (ADC) on page
EOC bit in
Table 70: Current characteristics on page
–
–
Table 72: General operating conditions on page
the ‘conditions’ column
Table 82: Characteristics of dual VOLTAGE HDFlash MEMORY on page
–
–
–
Section 12.7.3: Absolute maximum ratings (electrical sensitivity) on page
Removed text concerning dynamic latch-up
Electro-static discharge (ESD) on page
standard with AEC-Q100-002/003/011 standard
Added data for the LQFP44 package to I
Updated max I
Changed typical value of supply current (I
Changed minimum value of data retention time (t
condition to T
Changed the condition of write erase cycle (N
Starting the conversion
A
1: Changed minimum value of data retention time (t
IO
= 55°C
values for standard I/O and high sink I/O
on page 1
85: Amended text in note
38: Added a ‘caution’ about the reset vector when it is not
A
= 55°C
62: Amended
167: Replaced JESD22-A114A/A115A
21: Added footnote
155:
VDD
66: Deleted I/O port implementation
36: Added caution regarding use of PLL
DD
156: Updated temperature ranges in
) to < 10µA
and I
139: Amended text concerning the
note3
RW
3
RET
) to T
VSS
) to 20 years and changed the
of this section
A
(5)
= 85°C
RET
88: Removed
164:
) to 20 years
167:
Introduction
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