ST7232AK2-Auto STMicroelectronics, ST7232AK2-Auto Datasheet - Page 173

• Manufacturer Part Number: ST7232AK2-Auto
• Description: 8-bit MCU for automotive, 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
• Manufacturer: STMicroelectronics

Specifications of ST7232AK2-Auto

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators and bypass for external clock
• Four Power Saving Modes: halt, active halt, wait and slow
• Main Clock Controller With: real time base, beep and clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, PWM and pulse generator modes

ST7232Axx-Auto
12.9
12.9.1
Subject to general operating conditions for V
Table 89.
1. Hysteresis voltage between Schmitt trigger switching levels.
2. Data based on characterization results, not tested in production.
3. The I
4. Data guaranteed by design, not tested in production.
5. To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses applied on the
6. The reset network (the resistor and two capacitors) protects the device against parasitic resets, especially in noisy
Figure 76. RESET pin protection
1. The reset network protects the device against parasitic resets.
2. The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad. Otherwise the device
3. 3. Whatever the reset source is (internal or external), the user must ensure that the level on the RESET pin can go below
4. 4. Because the reset circuit is designed to allow the internal reset to be output in the RESET pin, the user must ensure that
t
w(RSTL)out
t
t
Symbol
h(RSTL)in
g(RSTL)in
ports and control pins) must not exceed I
RESET pin with a duration below t
environments.
can be damaged when the ST7 generates an internal reset (watchdog).
the V
the current sunk on the RESET pin (by an external pull-up for example) is less than the absolute maximum value specified
for I
R
V
V
V
V
Required
I
User external
hys
IO
ON
OL
IH
IL
reset circuit
INJ(RESET)
IO
IL
max. level specified in
current sunk must always respect the absolute maximum rating specified in
Schmitt trigger voltage hysteresis
Input low level voltage
Input high level voltage
Output low level voltage
Driving current on RESET pin
Weak pull-up equivalent resistor
Generated reset pulse duration
External reset pulse hold time
Filtered glitch duration
Asynchronous RESET pin
Asynchronous RESET pin
Control pin characteristics
in
Section 12.2.2 on page
0.01µF
Parameter
Section 12.9.1
h(RSTL)in
(2)
(6)
(2)
(3)
155.
VSS
can be ignored.
.
. Otherwise the reset is not taken into account internally.
(5)
(1)
DD
V
VDD = 5V
Internal reset sources
, f
V
DD
DD
CPU
= 5V
R
ON
, and T
Conditions
Filter
I
IO
A
= +2mA
unless otherwise specified.
Pulse generator
Section 12.2.2
0.85 x V
Min
2.5
20
20
Electrical characteristics
DD
Typ
200
and the sum of I
2.5
0.2
30
30
2
0.16 x V
Watchdog
Internal reset
42
Max
120
0.5
ST72XXX
(4)
IO
DD
173/201
(I/O
Unit
mA
kΩ
µs
µs
ns
V