ST7232AK2-Auto STMicroelectronics, ST7232AK2-Auto Datasheet - Page 63
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ST7232AK2-Auto
Manufacturer Part Number
ST7232AK2-Auto
Description
8-bit MCU for automotive, 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
Manufacturer
STMicroelectronics
Datasheet
1.ST7232AK2-AUTO.pdf
(201 pages)
Specifications of ST7232AK2-Auto
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and bypass for external clock
Four Power Saving Modes
halt, active halt, wait and slow
Main Clock Controller With
real time base, beep and clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, PWM and pulse generator modes
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ST7232Axx-Auto
9.2.2
9.2.3
Note:
External interrupt function
When an I/O is configured as input with interrupt, an event on this I/O can generate an
external interrupt request to the CPU.
Each pin can independently generate an interrupt request. The interrupt sensitivity is
independently programmable using the sensitivity bits in the EICR register.
Each external interrupt vector is linked to a dedicated group of I/O port pins (see
Pin description
as interrupt sources, these are first detected according to the sensitivity bits in the EICR
register and then logically ORed.
The external interrupts are hardware interrupts, which means that the request latch (not
accessible directly by the application) is automatically cleared when the corresponding
interrupt vector is fetched. To clear an unwanted pending interrupt by software, the
sensitivity bits in the EICR register must be modified.
Output modes
The output configuration is selected by setting the corresponding DDR register bit. In this
case, writing the DR register applies this digital value to the I/O pin through the latch. Then
reading the DR register returns the previously stored value.
Two different output modes can be selected by software through the OR register: Output
push-pull and open-drain.
See
Table 17.
Alternate functions
When an on-chip peripheral is configured to use a pin, the alternate function is automatically
selected. This alternate function takes priority over the standard I/O programming.
When the signal is coming from an on-chip peripheral, the I/O pin is automatically
configured in output mode (push-pull or open drain according to the peripheral).
When the signal is going to an on-chip peripheral, the I/O pin must be configured in input
mode. In this case, the pin state is also digitally readable by addressing the DR register.
Input pull-up configuration can cause unexpected value at the input of the alternate
peripheral input. When an on-chip peripheral use a pin as input and output, this pin has to
be configured in input floating mode.
Table 17
DR
0
1
DR register value and output pin status
for the DR register value and output pin status.
and
Section 7:
Interrupts). If several input pins are selected simultaneously
Push-pull
V
V
DD
SS
Open-drain
Floating
Vss
Section 2:
I/O ports
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