ST7232AK2-Auto STMicroelectronics, ST7232AK2-Auto Datasheet - Page 38

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ST7232AK2-Auto

Manufacturer Part Number
ST7232AK2-Auto
Description
8-bit MCU for automotive, 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7232AK2-Auto

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and bypass for external clock
Four Power Saving Modes
halt, active halt, wait and slow
Main Clock Controller With
real time base, beep and clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, PWM and pulse generator modes
Supply, reset and clock management
6.5
6.5.1
Caution:
38/201
Reset sequence manager (RSM)
Table 7.
Introduction
The reset sequence manager includes two reset sources as shown in
These sources act on the RESET pin and it is always kept low during the delay phase.
The reset service routine vector is fixed at addresses FFFEh-FFFFh in the ST7 memory
map.
The basic reset sequence consists of 3 phases as shown in
When the ST7 is unprogrammed or fully erased, the Flash is blank and the reset vector is
not programmed. For this reason, it is recommended to keep the RESET pin in low state
until programming mode is entered, in order to avoid unwanted behavior.
The 256 or 4096 CPU clock cycle delay allows the oscillator to stabilise and ensures that
recovery has taken place from the reset state. The shorter or longer clock cycle delay
should be selected by option byte to correspond to the stabilization time of the external
oscillator used in the application.
The reset vector fetch phase duration is 2 clock cycles.
External RESET source pulse
Internal watchdog reset
Active phase depending on the reset source
256 or 4096 CPU clock cycle delay (selected by option byte)
Reset vector fetch
ST7 clock source
C
Hardware configuration
External source
L1
OSC1
OSC1
capacitors
Load
ST7
ST7
OSC2
OSC2
C
Figure
L2
11:
Figure
ST7232Axx-Auto
12:

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