ST7232AK2-Auto STMicroelectronics, ST7232AK2-Auto Datasheet - Page 62
ST7232AK2-Auto
Manufacturer Part Number
ST7232AK2-Auto
Description
8-bit MCU for automotive, 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
Manufacturer
STMicroelectronics
Datasheet
1.ST7232AK2-AUTO.pdf
(201 pages)
Specifications of ST7232AK2-Auto
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and bypass for external clock
Four Power Saving Modes
halt, active halt, wait and slow
Main Clock Controller With
real time base, beep and clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, PWM and pulse generator modes
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I/O ports
9
9.1
9.2
9.2.1
Note:
62/201
1
2
3
Introduction
Functional description
Writing the DR register modifies the latch value but does not affect the pin status.
I/O ports
The I/O ports offer different functional modes:
●
For specific pins they offer different functional modes:
●
●
An I/O port contains up to 8 pins. Each pin can be programmed independently as digital
input (with or without interrupt generation) or digital output.
Each port has 2 main registers:
●
●
Each port also has one optional register:
●
Each I/O pin may be programmed using the corresponding register bits in the DDR and OR
registers: bit X corresponding to pin X of the port. The same correspondence is used for the
DR register.
The following description takes into account the OR register, (for specific ports which do not
provide this register refer to
I/O block diagram is shown in
Input modes
The input configuration is selected by clearing the corresponding DDR register bit. In this
case, reading the DR register returns the digital value applied to the external I/O pin.
Different input modes can be selected by software through the OR register.
When switching from input to output mode, the DR register has to be written first to drive the
correct level on the pin as soon as the port is configured as an output.
Do not use read/modify/write instructions (BSET or BRES) to modify the DR register as this
might corrupt the DR content for I/Os configured as input."
Transfer of data through digital inputs and outputs
External interrupt generation
Alternate signal input/output for the on-chip peripherals
Data register (DR)
Data direction register (DDR)
Option register (OR)
Section 9.3: I/O port implementation on page
Figure
26.
ST7232Axx-Auto
66). The generic
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