BSP-15 Equator Technologies, BSP-15 Datasheet - Page 17

• Manufacturer Part Number: BSP-15
• Description: Broadband Signal Processor
• Manufacturer: Equator Technologies

Chapter 2
September 6, 2002
Analog RGB
Digital RGB
Figure 2.1 BSP-15 DSP/CPU block diagram
The BSP-15 family of digital signal processors are high-performance processors providing broadband
applications with solutions addressing the convergence of communications, consumer appliances and
general purpose computing. The BSP-15 DSP family of chips combines general-purpose RISC-like data
processing with high-performance signal and image processing. The BSP-15 DSP family supports
C-like programmable video, image, and signal processing software implementations of compression
and decompression algorithms. The BSP-15 DSP family matches the cost and performance features of
dedicated fixed-function chips, with the added flexibility to rapidly respond to evolving standards.
Figure 2.1
core, programmable coprocessors, on-chip memories and I/O interfaces.
The main VLIW core executes four operations in parallel and supports partitioned SIMD operations for
8-, 16-, 32-, and 64-bit data types. Coprocessors on the BSP-15 DSP help accelerate serial operations
like variable length encoding/decoding and video filtering.
Several audio/video I/O interfaces are supported, including ITU-R BT.601/656 input and output; dual
MPEG-2 transport channel interface (TCI); IEC958 and IIS digital audio interfaces. Two video 656
inputs can be used at the same time. The Display Refresh Controller (DRC) supports both analog and
digital RGB outputs. In addition it provides hardware support for graphics/video overlay, hardware
cursor, and color space conversion. An IIC control bus interface is also provided.
ROM
Flash
27 MHz
66 MHz
32-bit
JTAG
shows a block diagram of the typical BSP-15 DSP. The BSP-15 DSP consists of a VLIW
ROMCON
Boundary Scan
PLLs
JTAG
Controller
Video Filter
Display
Refresh
6 KB VF
Memory
PCI
ITU-
OUT
Architecture Overview
656
Video Out
8 KB VLx
Memory
HWR.BSP15.DS.REV.H
VLx
GPD
P
GPDP
IN
Video In A
DES
DataStreamer DMA
VLIW Core
ITU-
656
IN
Controller
IG-ALU
IG-ALU
TCI
I-ALU
I-ALU
IN
Video In B
ITU-
656
IN
TCI
IN
IIC
64-bit DTS
32-bit IOB
Controller
SDRAM
Glueless
Audio I/O
BSP-15 Processor Datasheet
SDRAM
5