BSP-15 Equator Technologies, BSP-15 Datasheet - Page 76

• Manufacturer Part Number: BSP-15
• Description: Broadband Signal Processor
• Manufacturer: Equator Technologies

64
6.5.2 Processor clock
6.5.3 ROMCON
BSP-15 Processor Datasheet
Table 6-21 Processor Clock Terminations
ROM shares I/O with other interfaces during normal operational mode.
Table 6-22 ROMCOM Terminations
pclk
coreclk_byp_in
sdclk_byp_in
pixelclk_byp_in see notes
audioclk_byp_in see notes
coreclk_out
pixelclk_out
audioclk_out
rom_ale#
rom_wrt
rom_oe#
rom_cs#
Pin Name
Pin Name
see notes
see notes
see notes
see notes
see notes
see notes
Termination
supplies reference clock for the on-chip CORE/SDRAM, AUDIO, and
PIXEL PLLs.
CORE PLL uses this signal when the PLL is programmed to be in the
bypass mode. It supplies the clock for the VLIW core. The CORE PLL
comes out of reset in bypass mode, the bypass clock is needed during the
booting phase, a clock input to this pin is ESSENTIAL. The manufacturer
recommends tying the coreclk_byp_in and pclk together.
SDRAM PLL uses this signal when the PLL is programed to be in the
bypass mode. It supplies the clock for the SDRAM interface. If the
application will not use bypass mode, feed a slow frequency clock since this
signal is used during the memory block reset phase (i.e., the chip reset
phase), for some internal registers to be reset correctly. The clock needs to
be fast enough to produce a couple of edges during the time when the chip
is in reset.
PIXEL PLL uses the signal when the PIXEL PLL is programmed to be in
the bypass mode. It supplies the pixel clock for DRC and VideoDAC.
When not used, it can be weakly pulled down to ground. In BSP-15 DSP,
this signal can also be optionally used for the ITU-R.BT 656_OUT block,
as the output clock for the 8-bit parallel data port.
AUDIO PLL uses the signal when the AUDIO PLL is programmed to be in
the bypass mode. It supplies the clock for the audio blocks. When not
used, it can be weakly pulled down to ground.
This is the output of the core clock from the CORE PLL, used for debug.
When not used, it can be left floating.
This is the output of the pixel clock from the PIXEL PLL, used for debug.
Leave floating when not used.
This is the output of the audio clock from the AUDIO PLL, used for debug.
Leave floating when not used.
Notes
floating
floating
floating
floating
HWR.BSP15.DS.REV.H
Termination
Notes
September 6, 2002