BSP-15 Equator Technologies, BSP-15 Datasheet - Page 66

• Manufacturer Part Number: BSP-15
• Description: Broadband Signal Processor
• Manufacturer: Equator Technologies

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6.4.4 IEC958 interface timing
6.4.5 IIS interface timing
BSP-15 Processor Datasheet
Table 6-10 IEC958 interface timing parameters
The audio PLL generates audioclk_out for use by external codecs as master MCLK. MCLK can be
programmed for either 12.288 MHz or 16.933 MHz to achieve the desired audio sample rate (LRCLK),
according to
F
s
Symbol
Figure 6.4 IIS data format
clock delay from
LRCLK transmit
One serial bit
Table
Audio sample rate
Description
6-11. The MSB:LSB ordering can be reversed by software programming.
M
B
S
n n-1 n-2 n-3
Left Channel
HWR.BSP15.DS.REV.H
4
3
2
1
B
L
S
0
M
B
S
n n-1 n-2 n-3
Min
32
Right Channel
Typical
44.1
4
3
2
Max
1
48
September 6, 2002
B
L
S
0
Unit
kHz