FDC37C672QFP SMSC Corporation, FDC37C672QFP Datasheet - Page 105

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FDC37C672QFP

Manufacturer Part Number
FDC37C672QFP
Description
ENHANCED SUPER I/O CONTROLLER WITH FAST IR
Manufacturer
SMSC Corporation
Datasheet

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Enhanced Super I/O Controller with Fast IR
Datasheet
Note:
SMSC FDC37C672
1.
2.
While in powerdown the Ring Indicator interrupt is still valid and transitions when the RI input changes.
Exit Auto Powerdown
The transmitter exits powerdown on a write to the XMIT buffer. The receiver exits auto powerdown when
RXDx changes state.
Parallel Port
Direct power management is controlled by CR22. Refer to CR22 for more information.
Auto Power Management is enabled by CR23-B3. When set, this bit allows the ECP or EPP logical
parallel port blocks to be placed into powerdown when not being used.
The EPP logic is in powerdown under any of the following conditions:
1.
2.
The ECP logic is in powerdown under any of the following conditions:
1.
2.
Exit Auto Powerdown
The parallel port logic can change powerdown modes when the ECP mode is changed through the ecr
register or when the parallel port mode is changed through the configuration registers.
The transmitter enters auto powerdown when the transmit buffer and shift register are empty.
The receiver enters powerdown when the following conditions are all met:
a. Receive FIFO is empty
b. The receiver is waiting for a start bit.
EPP is not enabled in the configuration registers.
EPP is not selected through ecr while in ECP mode.
ECP is not enabled in the configuration registers.
SPP, PS/2 Parallel port or EPP mode is selected through ecr while in ECP mode.
DATASHEET
Page 105
Rev. 10-29-03

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