FDC37C672QFP SMSC Corporation, FDC37C672QFP Datasheet - Page 26

• Manufacturer Part Number: FDC37C672QFP
• Description: ENHANCED SUPER I/O CONTROLLER WITH FAST IR
• Manufacturer: SMSC Corporation

Note:
6.1.5
SMSC FDC37C672
L0-CRF2-Bx = Logical Device 0, Configuration Register F2, Bit x.
Data Rate Select Register (DSR)
Address 3F4 WRITE ONLY
This register is write only. It is used to program the data rate, amount of write precompensation, power
down status, and software reset. The data rate is programmed using the Configuration Control Register
(CCR) not the DSR, for PC/AT and PS/2 Model 30 and Microchannel applications. Other applications can
set the data rate in the DSR. The data rate of the floppy controller is the most recent write of either the
DSR or CCR. The DSR is unaffected by a software reset. A hardware reset will set the DSR to 02H, which
corresponds to the default precompensation setting and 250 Kbps.
RESET
COND.
DIGITAL OUTPUT REGISTER
Bit 1
RESET
0
0
1
1
S/W
7
0
POWER
DOWN
6
0
INPUT
INPUT
Pin 19
Pin 20
0
1
0
1
Bit 0
0
1
0
1
DATASHEET
Table 6.8 - Drive Type ID
Table 6.6 - Media ID1
Table 6.7 - Media ID0
5
0
0
L0-CRF1-B5
CRF1-B4
COMP2
Page 26
PRE-
= 0
= 0
0
1
0
1
4
0
L0-CRF2 - B1
L0-CRF2 - B3
L0-CRF2 - B5
L0-CRF2 - B7
REGISTER 3F3 - DRIVE TYPE ID
MEDIA ID1
MEDIA ID0
Bit 5
BIT 7
BIT 6
COMP1
PRE-
L0-CRF1-B5
3
0
CRF1-B4
= 1
= 1
1
0
1
0
COMP0
PRE-
2
0
L0-CRF2 - B0
L0-CRF2 - B2
L0-CRF2 - B4
L0-CRF2 - B6
Enhanced Super I/O Controller with Fast IR
Bit 4
DRATE
SEL1
1
1
DRATE
SEL0
0
0
Rev. 10-29-03
Datasheet