FDC37C672QFP SMSC Corporation, FDC37C672QFP Datasheet - Page 87

• Manufacturer Part Number: FDC37C672QFP
• Description: ENHANCED SUPER I/O CONTROLLER WITH FAST IR
• Manufacturer: SMSC Corporation

Enhanced Super I/O Controller with Fast IR
Datasheet
Notes:
12.2
12.2.1 Vocabulary
SMSC FDC37C672
SPP and EPP can use 1 common register.
nWrite is the only EPP output that can be over-ridden by SPP control port during an EPP cycle. For correct EPP
read cycles, PCD is required to be a low.
Extended Capabilities Parallel Port
ECP provides a number of advantages, some of which are listed below. The individual features are
explained in greater detail in the remainder of this section.
The following terms are used in this document:
assert:
forward:
reverse:
Pword:
1
0
These terms may be considered synonymous:
Reference Document: IEEE 1284 Extended Capabilities Port Protocol and ISA Interface Standard, Rev
1.14, July 14, 1993. This document is available from Microsoft.
High performance half-duplex forward and reverse channel
Interlocked handshake, for fast reliable transfer
Optional single byte RLE compression for improved throughput (64:1)
Channel addressing for low-cost peripherals
Maintains link and data layer separation
Permits the use of active output drivers
Permits the use of adaptive signal timing
Peer-to-peer capability
PeriphClk, nAck
HostAck, nAutoFd
PeriphAck, Busy
nPeriphRequest, nFault
nReverseRequest, nInit
nAckReverse, PError
Xflag, Select
ECPMode, nSelectln
HostClk, nStrobe
When a signal asserts it transitions to a "true" state, when a signal deasserts it transitions to a
"false" state.
Host to Peripheral communication.
Peripheral to Host communication
A port word; equal in size to the width of the ISA interface. For this implementation, PWord is
always 8 bits.
A high level.
A low level.
DATASHEET
Page 87
Rev. 10-29-03