FDC37C672QFP SMSC Corporation, FDC37C672QFP Datasheet - Page 78

• Manufacturer Part Number: FDC37C672QFP
• Description: ENHANCED SUPER I/O CONTROLLER WITH FAST IR
• Manufacturer: SMSC Corporation

Chapter 10 Infrared Interface
SMSC FDC37C672
The infrared interface provides a two-way wireless communications port using infrared as a transmission
medium. Two IR implementations have been provided for the second UART in this chip (logical device 5),
IrDA and Amplitude Shift Keyed IR. The IR transmission can use the standard UART2 TXD2 and RXD2
pins or optional IRTX and IRRX pins. These can be selected through the configuration registers.
IrDA allows serial communication at baud rates up to 4 Mbps. Each word is sent serially beginning with a
zero value start bit. A zero is signaled by sending a single IR pulse at the beginning of the serial bit time.
A one is signaled by sending no IR pulse during the bit time. Please refer to the AC timing for the
parameters of these pulses and the IrDA waveform.
The Amplitude Shift Keyed IR allows serial communication at baud rates up to 19.2K Baud. Each word is
sent serially beginning with a zero value start bit. A zero is signaled by sending a 500KHz waveform for
the duration of the serial bit time. A one is signaled by sending no transmission during the bit time. Please
refer to the AC timing for the parameters of the ASK-IR waveform.
If the Half Duplex option is chosen, there is a time-out when the direction of the transmission is changed.
This time-out starts at the last bit transferred during a transmission and blocks the receiver input until the
timeout expires. If the transmit buffer is loaded with more data before the time-out expires, the timer is
restarted after the new byte is transmitted. If data is loaded into the transmit buffer while a character is
being received, the transmission will not start until the time-out expires after the last receive bit has been
received. If the start bit of another character is received during this time-out, the timer is restarted after the
new character is received. The IR half duplex time-out is programmable via CRF2 in Logical Device 5. This
register allows the time-out to be programmed to any value between 0 and 10msec in 100usec
increments.
DATASHEET
Page 78
Enhanced Super I/O Controller with Fast IR
Rev. 10-29-03
Datasheet