FDC37C672QFP SMSC Corporation, FDC37C672QFP Datasheet - Page 163

• Manufacturer Part Number: FDC37C672QFP
• Description: ENHANCED SUPER I/O CONTROLLER WITH FAST IR
• Manufacturer: SMSC Corporation

Enhanced Super I/O Controller with Fast IR
Datasheet
Note:
SMSC FDC37C672
NAME
t10
t11
t12
t13
t15
t19
t20
t21
t22
t23
t2
t3
t4
t5
t8
nADDRSTB
nDATASTB
WRITE is controlled by setting the PDIR bit to "1" in the control register before performing an EPP Read.
nIOR Deasserted to Command Deasserted
nWAIT Asserted to IOCHRDY Deasserted
Command Deasserted to PDATA Hi-Z
Command Asserted to PDATA Valid
nIOR Asserted to IOCHRDY Asserted
nWAIT Deasserted to IOCHRDY Deasserted
IOCHRDY Deasserted to nIOR Deasserted
nIOR Deasserted to SDATA High-Z (Hold Time)
PDATA Valid to SDATA Valid
Time Out
Ax Valid to nIOR Asserted
nIOR Deasserted to Ax Invalid
Command Deasserted to nWAIT Deasserted
nIOR Deasserted to nIOW or nIOR Asserted
nIOR Asserted to Command Asserted
IOCHRDY
SD<7:0>
PD<7:0>
nWRITE
A0-A10
nWAIT
PDIR
nIOR
t19
Table 21.5 - EPP 1.7 Data or Address Read Cycle Parameters
Figure 21.16 - EPP 1.7 Data or Address Read Cycle
t23
DESCRIPTION
t8
t3
DATASHEET
t5
t15
Page 163
t13
t10
t11
MIN
10
40
10
40
0
0
0
0
0
0
t2
t20
t12
t4
TYP
t22
t21
MAX
50
40
24
50
40
40
12
55
Rev. 10-29-03
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns