dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 103
dp8344b
Manufacturer Part Number
dp8344b
Description
Biphase Communications Processor?bcp
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP8344B.pdf
(184 pages)
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5 0 Device Specifications
Note 1 All parameters are individually tested and guaranteed Interpreting this data by numerically adding two or more parameters to create a new timing
specification may lead to invalid results
Note 2 When ATA
The additional delay relative to a message with ATA
t
t
t
t
t
t
PD-X1-TA
PD-XTCLK-TA
PD-DODD-TA
W-DO-HB
W-DO-FB
PD-DO-DD
Symbol
e
1 TX-ACT is delayed by 4C and an additional line quiescent is generated resulting in 5
ID
1
2
3
4
5
6
X1 Rising to TX-ACT Rising Falling
X-TCLK Rising to TX-ACT Rising Falling
DATA-OUT DATA-DLY Valid to TX-ACT Rising
DATA-OUT Half Bit Cell Width
DATA-OUT Full Bit Cell Width
DATA-OUT Falling Rising to DATA-DLY
Rising Falling (Note 3)
(a) Transmission Beginning Timing (Note 2)
TABLE 5-7 Transceiver Timing (Note 1)
(Continued)
e
0 is 8C (one bit time)
(b) Transmission Ending Timing
FIGURE 5-7 Transceiver Timing
Parameter
103
Formula
4C
8C
2C
C
a
line quiescent pulses after the line interface logic
a
a
a
b
b
b
Min
10
16
7
10
10
10
Max
TL F 9336 – 57
65
49
10
10
10
TL F 9336 – 56
Units
ns
ns
ns
ns
ns
ns
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