dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 136

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dp8344b

Manufacturer Part Number
dp8344b
Description
Biphase Communications Processor?bcp
Manufacturer
National Semiconductor Corporation
Datasheet

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6 0 Reference Section
ADCA Add with Carry and Accumulator
Syntax
ADCA Rs Rd
ADCA Rs mIr
Affected Flags
N Z C V
Description
Adds the source register Rs the active accumulator and
the carry flag together placing the result into the destination
specified The destination may be either a register Rd or
data memory via an index register mode
register bank selection determines which accumulator is ac-
tive
Example
Add the constant 109 to the index register IW (which is 16
bits wide)
SUBA A A
ADD
ADCA R13 R13
109 R12
(No Instruction or Data Memory Wait States CPU Running at Full Speed CCS
Clear the accumulator
Add 109 to low byte of IW
Add carry to high byte of IW
FIGURE 6-7 Instruction Data Memory Bus Timing for Data Memory Write
register register
register indexed
(Continued)
mIr
Note that
136
Instruction Format
ADCA Rs Rd
T-states
ADCA Rs Rd
ADCA Rs mIr
Bus Timing
ADCA Rs Rd
ADCA Rs mIr
Operation
ADCA Rs Rd
Rs
ADCA Rs mIr
Rs
ADCA Rs mIr
1
15
a
a
1
accumulator
accumulator
Opcode
1
0
0
a
a
1
carry bit
carry bit
9
Figure 6-1
Figure 6-6
2
3
Rd
x
x
Rd
data memory
e
TL F 9336 – 26
0)
4
Rs
TL F 9336 – 5
0

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