dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 11

• Manufacturer Part Number: dp8344b
• Description: Biphase Communications Processor?bcp
• Manufacturer: National Semiconductor Corporation

Figures 1-6a through 1-6f show the internal data flow path
1 0 Communications Processor Introduction
1 4 DATA FLOW
The CPU registers are all dual port that is they have sepa-
rate input and output paths This arrangement allows a sin-
gle register to function as both a source and a destination
within the same instruction
for the BCP The CPU registers are a central element to this
path When a register functions as an output its contents
are placed on the Source bus When a register is an input
data from the Destination bus is written into that register
FIGURE 1-6d WRITE to Transmitter
FIGURE 1-6a Register to Register
TL F 9336 – C3
TL F 9336 – C6
FIGURE 1-6b Data Memory WRITE
FIGURE 1-6e READ from Receiver
11
Figure 1-6a shows the data path for all arithmetic instruc-
The other key element in the data path is the ALU This unit
does all of the arithmetic and data manipulation operations
but it also has bus multiplexing capabilities Both the Data
Memory bus and a portion of the Instruction Memory bus
are routed to this unit and serve as alternative sources of
data Since the data flow is always through this unit most
data moves may include arithmetic manipulations with no
penalty in execution time
tions and register to register moves The source register
contents are placed on the Source bus routed through the
TL F 9336 – C4
TL F 9336 – C7
(Continued)
FIGURE 1-6f Load Immediate Data
FIGURE 1-6c Data Memory READ
TL F 9336 – C5
TL F 9336 – C8