dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 172

• Manufacturer Part Number: dp8344b
• Description: Biphase Communications Processor?bcp
• Manufacturer: National Semiconductor Corporation

6 0 Reference Section
TRL TIMER REGISTER LOW
TM7 – 0
Main R28 read write
TM7
7
TM6
6
TiMer
Further information Section 2 1 1 4 Timer Regis-
ters
TM5
5
Input output port of low byte of timer
TM4
4
TM3
3
(Continued)
TM2
2
TM1
1
TM0
0
172
TSR TRANSCEIVER STATUS REGISTER
TFF
TA
RE
RA
DAV
RF10 – 8
Alternate R5 read only
TFF
7
TA
6
Transmit FIFO Full
mit FIFO is full
when TFF is high
Transmitter Active
ACT indicating that data is being transmitted
Unlike TX-ACT however TA is not disabled by
Receiver Error
ror is detected Cleared by reading ECR or by
asserting TRES
Receiver Active
ing sequence is received Cleared when either
an end of message or an error is detected In
5250 modes RA is cleared at the same time
as LA
Data AVailable
available in RTR and TSR Cleared by read-
ing RTR
Receive FIFO
flect the state of the top word of the receive
FIFO
Further information Section 3 0 Transceiver
LOOP
RE
5
RA
4
or when an error is detected
DAV
RTR must not be written to
3
Set high when a receiver er-
RF10 – 8 and RTF7 – 0 re-
Set high when valid data is
Set high when a valid start-
Set high when the trans-
Reflects the state of TX-
RF10
2
RF9
1
RF8
0