dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 22
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dp8344b
Manufacturer Part Number
dp8344b
Description
Biphase Communications Processor?bcp
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP8344B.pdf
(184 pages)
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2 0 CPU Description
Integer Arithmetic Instructions
The integer arithmetic instructions operate on 8-bit signed
(two’s complement) binary numbers Two arithmetic func-
tions are supported Add and Subtract Three versions of
the Add and Subtract instructions exist operand
lator operand
and
ister and indexed addressing modes for the destination op-
erand These two versions also allow the specification of a
separate register or data address for the destination oper-
and so that the sources may retain their integrity (i e true
three-operand instructions) Note that the currently active
‘‘B’’ register bank selects which accumulator is used in
these instructions The third version immediate operand
operand only supports the register addressing mode for the
destination operand with the register as both a source and
the destination Table 2-6 lists the integer arithmetic instruc-
tions along with their variations
Note
ADD
ADDA
ADDA
ADCA
ADCA
SUB
SUBA
SUBA
SBCA
SBCA
g
AND
ANDA
ANDA
OR
ORA
ORA
XOR
XORA
XORA
CPL
l
r
Z
e
e
e
e
operand The first two versions support both the reg-
logical OR operation
logical exclusive OR operation
one’s complement
logical AND operation
Syntax
Syntax
n rsd
Rs Rd
Rs mlr
Rs Rd
Rs mlr
n rsd
Rs Rd
Rs mlr
Rs Rd
Rs mlr
g
n rsd
Rs Rd
Rs mlr
n rsd
Rs Rd
Rs mlr
n rsd
Rs Rd
Rs mlr
Rsd
accumulator
g
carry and immediate oper-
(Continued)
register
Rs
Rs
Rs
Rs
register
Rs
Rs
Rs
Rs
TABLE 2-6 Integer Arithmetic Instructions
a
a
a
a
b
b
b
b
register
Rs
Rs
register
Rs
Rs
register
Rs
Rs
register
accumulator
accumulator
accumulator
accumulator
accumulator
accumulator
accumulator
accumulator
l
l
Z
Z
b
a
accumulator
accumulator
TABLE 2-7 Logic Instructions
accumulator
accumulator
g
accumulator
accumulator
n
n
Instruction Operation
Instruction Operation
l
x
accumu-
Z
x
x
n
n
n
x
x
x
register
register
register
x
x
b
b
g
x
x
a
a
register
register
carry
carry
x
x
register
carry
carry
x
x
x
x
Rd
data memory
Rd
data memory
22
Rd
data memory
x
x
Rd
data memory
x
x
Rd
data memory
Logic Instructions
The logic instructions operate on 8-bit binary data A full set
of logic functions is supported by the BCP AND OR eXclu-
sive OR and Complement All the logic functions except
complement allow either an immediate operand or the cur-
rently active accumulator as an implied operand Comple-
ment only allows one register operand which is both the
source and destination The other logic instructions include
the following addressing modes register indexed and im-
mediate As with the integer arithmetic instructions the in-
tegrity of the sources may be maintained by specifying a
destination register which is different from the source Table
2-7 lists all the logic instructions
Rd
data memory
Rd
data memory
Immediate Limited Register
Register Register
Register Indexed
Immediate Limited Register
Register Register
Register Indexed
Immediate Limited Register
Register Register
Register Indexed
Register
Immediate Limited Register
Register Register
Register Indexed
Register Register
Register Indexed
Immediate Limited Register
Register Register
Register Indexed
Register Register
Register Indexed
Addressing Modes
Addressing Modes
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