dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 57

no-image

dp8344b

Manufacturer Part Number
dp8344b
Description
Biphase Communications Processor?bcp
Manufacturer
National Semiconductor Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
dp8344bV
Manufacturer:
NSC
Quantity:
5 510
Part Number:
dp8344bV
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
dp8344bV
Manufacturer:
NS/国半
Quantity:
20 000
B2
3 0 Transceiver
When formatting a 3299 address frame the procedure is
the same as for a 3270 frame with RTR 7 – 2
the address to be transmitted The only bit in TCR which
has any functional meaning in this mode is OWP which
controls the type of parity required on B1 – B8 Similarly
when the receiver de-formats a 3299 address frame the
received address bits are loaded into RTR 7 – 2
The POLL POLL ACK and TT AR flags in the Network
Command Flag Register are valid only in 3270 and 3299
(excluding the 3299 address frame) modes These flags are
decodes of their respective coax commands as defined in
Table 3-4 The Data Error or Message End DEME flag
(also in the NCF register) indicates different information
depending on the selected protocol In 3270 and 3299
match the locally generated odd parity on bits B2 – B9 of the
received frame
logic it functions only as a status flag to the CPU These
flags are decoded from the last location in the FIFO and are
valid only when DAV is asserted they are cleared by read-
ing RTR and must be checked before advancing the re-
ceiver FIFO
All flags cleared by reading RTR
0
X
X
1 – 0
DEME is set when B10 of the received frame does not
and TSR 2 – 0
B3
0
X
X
B4
0
X
X
DEME is not part of the receiver error
B5
0
1
0
are undefined
(Continued)
FIGURE 3-10 5250 Frame Assembly Disassembly Description
Received Word
B6
0
0
0
TABLE 3-4 Decode of 3270 Coax Commands
B7
0
0
0
B8
0
0
0
defining
RTR
B9
0
1
1
57
B10
X
X
0
5250 Modes
The biphase data is inverted in the 5250 protocol relative to
3270 3299 (see the Protocol section IBM 5250) Depend-
ing on the external line interface circuitry the transceiver’s
biphase inputs and outputs may need to be inverted by as-
serting the RIN (Receiver INvert) and TIN (Transmitter
INvert) control bits in TMR
For information on how data must be organized in TCR
and RTR for input to the transmitter and how data ex-
tracted from a received frame is organized by the receiver
and mapped into TSR and RTR
To transmit a 5250 message the least significant 4 bits of
parity control information The station address field (B4 – B6)
is defined by TCR 2 – 0
parity (even or odd) calculated on B4 – B15 and transmitted
as B3 When the 8-bit data byte is written to RTR
resulting composite 12-bit word is loaded into the transmit
FIFO starting the transmitter The same TCR contents
can be used for more than one frame of a multi-frame trans-
mission or changed for each frame
The 5250 protocol defines bits B0 – B2 as fill bits which the
transmitter automatically appends to the parity bit (B3) to
TCR must first be set up with the correct address and
B11
0
1
1
RAR
ACK
POLL
Flag
and OWP controls the type of
TT AR (Clean Status) Received
POLL ACK Command Received
POLL Command Received
Description
see Figure 3-10
TL F 9336 – 49
the

Related parts for dp8344b