dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 171
dp8344b
Manufacturer Part Number
dp8344b
Description
Biphase Communications Processor?bcp
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP8344B.pdf
(184 pages)
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6 0 Reference Section
TMR TRANSCEIVER MODE REGISTER
TRES
LOOP
RPEN
RIN
TIN
PS2 – 0
Alternate R7 read write
TRES
7
LOOP
6
Transceiver RESet
when high Transceiver can also be reset by
RESET without affecting TRES
Internal LOOP-back
is disabled (held at 0) and transmitter serial
data is internally directed to the receiver serial
data input
RePeat ENable
can be active at the same time as the trans-
mitter
Receiver INvert
serial data is inverted
Transmitter INvert
mitter serial data outputs are inverted
Protocol Select
transmitter and receiver
Further information Section 3 0 Transceiver
PS2 – 0 Protocol
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
RPEN
5
3270
3299 multiplexer
3299 controller
3299 repeater
5250
5250 promiscuous
8-bit
8-bit promiscuous
RIN
4
TIN
Selects protocol for both
When high the receiver
When high the receiver
3
(Continued)
When high the trans-
When high TX-ACT
Resets transceiver
PS2
2
PS1
1
PS0
0
171
TRH TIMER REGISTER
TM15 – 8
Main R29 read write
TM15 TM14 TM13 TM12 TM11 TM10 TM9 TM8
7
6
TiMer
Further information Section 2 1 1 4 Timer Reg-
isters
5
Input output port of high byte of timer
4
HIGH
3
2
1
0
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