dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 115
dp8344b
Manufacturer Part Number
dp8344b
Description
Biphase Communications Processor?bcp
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP8344B.pdf
(184 pages)
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t
t
t
t
t
t
t
t
t
t
t
t
t
t
5 0 Device Specifications
Note 1 All parameters are individually tested and guaranteed Interpreting this data by numerically adding two or more parameters to create a new timing
specification may lead to invalid results
Note 2 The maximum value for this parameter is the latest RAE REM-WR can be removed without adding a T-state to the remote access
SU-RRW-CO
H-RRW-X
SU-CMD-RRW
H-CMD-RRW
PD-RRW-X
PD-X-LCL
PD-LCL-X
PD-RRW-LCL
PD-LCL-WR
PD-WR-X
PD-RRW-WR
AZ-AAD-LCL
AZ-LCL-AAD
W-WR
Symbol
ID
10
11
12
13
14
1
2
3
4
5
6
7
8
9
RAE REM-WR Falling before CLK-OUT Rising
RAE REM-WR Rising after XACK Rising (Note 2)
CMD Valid before RAE REM-WR Falling
CMD Invalid after RAE REM-WR Falling
RAE REM-WR Falling to XACK Falling
XACK Falling to LCL Rising
LCL Rising to XACK Rising
RAE REM-WR to LCL Falling
LCL Rising to WRITE Falling
WRITE Falling to XACK Rising
RAE REM-WR Rising to WRITE Rising
A AD Disabled before LCL Rising
A AD Enabled after LCL Falling
WRITE Low
TABLE 5-18 Slow Buffered Write of DMEM (Note 1)
FIGURE 5-18 Slow Buffered Write of DMEM
(Continued)
Parameter
115
(n
(n
(n
(n
DW
DW
DW
Formula
LW
T
T
T
T
T
T
a
a
a
a
H
L
a
a
a
a
a
a
1)T
2)T
1)T
1)T
a
a
a
a
b
b
b
b
Min
b
b
b
24
26
0
0
5
2
10
17
20
10
5
5
3
Max
b
26
28
8
34
TL F 9336 – 72
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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