dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 50

• Manufacturer Part Number: dp8344b
• Description: Biphase Communications Processor?bcp
• Manufacturer: National Semiconductor Corporation

3 0 Transceiver
sible for the transmitter and receiver to operate with differ-
ent protocols at the same time The protocol mode should
only be changed when both transmitter and receiver are
inactive
If both transmitter and receiver are connected to the same
line they should be configured to operate sequentially (half-
duplex) This mode of operation is achieved by clearing the
RePeater ENable control bit RPEN in
mode an active transmitter will disable the receiver pre-
venting simultaneous operation of transmitter and receiver
If the transmitter FIFO is loaded while the receiver is active-
ly processing an incoming signal the receiver will be dis-
abled and flag the CPU that a ‘‘Receiver Disabled While
Active’’ error has occurred (See Receiver Errors in this sec-
PS2 – 0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Protocol Mode
3270
3299 Multiplexer
3299 Controller
3299 Repeater
5250
5250 Promiscuous
8-Bit
8-Bit Promiscuous
(Continued)
TABLE 3-1 Protocol Mode Definition
TMR
Standard IBM 3270 protocol
Receiver expects first frame to be address frame Transmitter uses standard
3270 no address frame
Transmitter generates address frame as first frame Receiver expects standard
3270 no address frame
Both transmitter and receiver operate with first frame as address frame
Non-promiscuous mode DAV asserted only when first frame address matches
General-purpose 8-bit protocol with first frame address Non-promiscuous mode
DAV asserted on all valid received data without regard to address field
DAV asserted only when first frame address matches ATR
DAV asserted on all valid received frames
ATR
In this
50
tion ) On power-up reset the transceiver defaults to this
half-duplex mode
By asserting the Repeat Enable flag RPEN the receiver is
not disabled by the transmitter allowing both transmitter
and receiver to be active at the same time This feature
provides for the implementation of a repeater function or
loopback for test purposes
The transmitter output can be connected to the receiver
input implementing a local (on-chip) loopback by asserting
transmitter and receiver at the same time With LOOP as-
serted the output TX-ACT is disabled keeping the external
line driver in TRI-STATE The internal flag TA is still en-
abled as are the serial data outputs
LOOP
RPEN must also be asserted to enable both the
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