dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 69

• Manufacturer Part Number: dp8344b
• Description: Biphase Communications Processor?bcp
• Manufacturer: National Semiconductor Corporation

4 0 Remote Interface and Arbitration System (RIAS)
In both Buffered Write Modes XACK is asserted to wait the
RP The Latched Write Mode makes it possible for the RP to
write to the BCP without getting waited The timing for the
Latched Write Mode is shown in Figure 4-11 When the Re-
mote Processor writes to the BCP its address and data
buses are externally latched on the rising edge of REM-WR
Even though REM-WR has been asserted XACK does not
FIGURE 4-11 Latched Write from Remote Processor
FIGURE 4-10 Buffered Write from Remote Processor
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(a) Slow Buffered Write
(b) Fast Buffered Write
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Figure 4-12 The blocks A B C and D indicate the location
switch The BCP only begins remote access execution after
the trailing edge of REM-WR Since the RP is not requesting
data back from the BCP it can continue execution without
waiting for the BCP to complete the remote access After
REM-WR is deasserted WR-PEND is taken low to prevent
overwrite of the latches A minimum of two T-states later
LCL switches and AD A and the external address latch go
into TRI-STATE allowing the latches which contain the re-
mote address and data to become active If the RP attempts
to initiate another access before the current write is com-
plete XACK is taken low to wait the RP and the address
and the data are safe because WR-PEND prevents the
latches from opening The Access Phase ends when
INT-WRITE rises and the data is written One T-state later
LCL falls and one T-state after that WR-PEND rises If an-
other access is pending it can begin in the next T-state
This is indicated by XACK rising when WR-PEND rises
A minimum BCP RP interface utilizes four TRI-STATE buff-
ers or latches A block diagram of this interface is shown in
of buffers or latches Blocks A and B isolate 16 bits of the
RP’s address bus from the BCP’s Data Address bus Two
more blocks C and D bidirectionally isolate 8 bits of the
RP’s data bus from the BCP AD bus
(Continued)
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TL F 9336 – 94