adau1442 Analog Devices, Inc., adau1442 Datasheet - Page 28

• Manufacturer Part Number: adau1442
• Description: Sigmadsp Digital Audio Processor With Flexible Audio Routing Matrix
• Manufacturer: Analog Devices, Inc.

Self-Boot
On power-up, the ADAU144x can load a program and a set of
parameters that are saved in an external EEPROM. Combined
with the auxiliary ADC and the multipurpose pins, this can
potentially eliminate the need for a microcontroller in a simple
audio system. The self-boot sequence is accomplished by the
ADAU144x acting as a master on the I
occurs when the SELFBOOT pin is set high. The ADAU144x
cannot self-boot in SPI mode.
The maximum necessary EEPROM size is 40,960 bytes, or
40 kB. This much memory is only needed if the program RAM
(4096 × 6 bytes) and parameter RAM (4096 × 4 bytes) are each
completely full.
A self-boot operation is triggered on the rising edge of RESET
when the SELFBOOT pin is set high, and it occurs after 10 ms
when the PLL has locked. The ADAU144x reads program,
parameter, and register data from the EEPROM. Once the
ADAU144x has finished self-booting, further messages can be
sent to the ADAU144x on the I
not necessary in a self-booting application. The I
address for the ADAU144x is 0x68 for a write and 0x69 for a
read in this mode. The ADDRx pins have different functions
when the chip is in this mode, so the settings on them are
ignored.
The ADAU144x is a master on the I
operation. Care should be taken that no other device on the I
bus tries to perform a write operation during self-booting. The
Table 14. Functions of the Control Port Pins
Pin
SCL/CCLK
SDA/COUT
ADDR1/CDATA
CLATCH
ADDR0
Table 15. EEPROM Message Types
Message ID
0x00
0x01
0x02
0x03
I
SCL—input
SDA—open collector output
ADDR1—input
Unused input—tie to ground or VDD
ADDR0—input
2
C Mode
2
C bus, although this typically is
Message Type
End
Write
Delay
No op
2
C bus during a self-boot
2
C bus on startup, which
2
C device
Rev. PrA | Page 28 of 92
2
C
SPI Mode
CCLK—input
COUT—output
CDATA—input
CLATCH—input
ADDR0—input
ADAU144x generates SCL at 8 × f
SCL runs at 384 kHz. SCL has a duty cycle of ⅜ in accordance
with the I
The ADAU144x reads from EEPROM Chip Address 0xA1. The
LSBs of the addresses of some EEPROMs are pin configurable;
in most cases, these pins should be tied low to set this address.
SigmaStudio writes to the EEPROM at Address 0xA0.
EEPROM Format
The EEPROM data contains a sequence of messages. Each
discrete message is one of the seven types defined in Table 15.
Each message consists of a sequence of one or more bytes. The
first byte identifies the message type. Bytes are written MSB
first. Most messages are block write (0x01) types, which are
used for writing to the ADAU144x program RAM, parameter
RAM, and control registers.
The body of the message following the message type should
start with a byte indicating message length and then include a
byte indicating the chip address. Following this is always a
2-byte register or memory address field, as with all other
control port transactions.
SigmaStudio is capable of generating the EEPROM data necessary
to self-boot the ADAU144x, with the write latest compilation to
E2PROM function, which can be accessed by right-clicking the
ADAU144x IC in the hardware configuration window.
Following Bytes
None
One byte indicating message length (including chip address and
subaddress), one byte indicating chip address, two bytes
indicating subaddress, and an appropriate number of data bytes
Two bytes for delay
None
2
C specification.
Self-Boot
SCL—output
SDA—open collector output
Unused input—tie to ground or VDD
Unused input—tie to ground or VDD
Unused input—tie to ground or VDD
s
, so when f
s,NORMAL
is 48 kHz,