adau1442 Analog Devices, Inc., adau1442 Datasheet - Page 57

• Manufacturer Part Number: adau1442
• Description: Sigmadsp Digital Audio Processor With Flexible Audio Routing Matrix
• Manufacturer: Analog Devices, Inc.

ASYNCHRONOUS SAMPLE RATE CONVERTERS
The integrated sample rate converters of the ADAU144x
processors can be configured in various ways to facilitate
asynchronous connectivity to other components in the audio
system. The sample rate converters operate completely
independent of the serial ports and DSP core, connecting via
the flexible audio routing matrix. The ADAU1442 has eight
stereo sample rate converters.
ASRC MODES AND SETTINGS
Table 34. Addresses of ASRC Modes Registers
Decimal
57601
57603
57665
57667
ASRC[3:0] Lock Status and Mute Register (Address 0xE101)
Table 35. Bit Descriptions of Register 0xE101
Bit Position
[15:12]
[11]
[10]
[9]
[8]
[7:4]
[3]
[2]
[1]
[0]
Every sample rate converter pair for ASRCs[3:0]) can be muted.
This function is controlled by a single 12-bit register. The mute
bits (Bits[3:0]) are active high, so a value of 1 mutes the corre­
sponding ASRC, and a value of 0 unmutes the corresponding ASRC.
If the ASRC cannot find the ratio between the input and output
clock, the lock status bits (Bits[11:8]) are each set to 0, and the
ASRC automatically mutes itself. An ASRC mute can also be
manually initiated by setting the corresponding bit (Bits[3:0]) to
1. The muting is done with a volume ramp and is click and pop
free. If desired, the mute ramp can be disabled for ASRC[3:0] (see
the ASRC[3:0] Mute Ramp Disable Register (Address 0xE103)
section).
Address
Hex
E101
E103
E141
E143
Description
Reserved
ASRC 3 (Channel 6, Channel 7)
lock status (read only)
ASRC 2 (Channel 4, Channel 5)
lock status (read only)
ASRC 1 (Channel 2, Channel 3)
lock status (read only)
ASRC 0 (Channel 0, Channel 1)
lock status (read only)
Reserved
ASRC 3 (Channel 6, Channel 7) mute
ASRC 2 (Channel 4, Channel 5) mute
ASRC 1 (Channel 2, Channel 3) mute
ASRC 0 (Channel 0, Channel 1) mute
Name
ASRCs[3:0] lock
status and mute
ASRCs[3:0] mute
ramp disable
ASRCs[7:4] lock
status and mute
ASRCs[7:4] mute
ramp disable
Read/Write
Word Length
16 bits (2 bytes)
16 bits (2 bytes)
16 bits (2 bytes)
16 bits (2 bytes)
Default
0
0
0
0
0
0
0
0
Rev. PrA| Page 57 of 92
In the case of the ADAU1446, setting these registers does not
affect system operation in any way.
ASRC[3:0] Mute Ramp Disable Register (Address 0xE103)
Table 36. Bit Descriptions of Register 0xE103
Bit
Position
[15:1]
[0]
This single-bit register controls the behavior of ASRCs[3:0]
(Channels[7:0]) on a loss of lock. When Bit 0 is set to the
default (0), ASRCs[3:0] (Channels[7:0]) mute with a volume
ramp. When Bit 0 is set to 1, ASRCs[3:0] mute abruptly. In
addition, setting this bit to 1 ignores the ASRC mute bits
(Bits[3:0]) in Register 0xE101 (see the ASRC[3:0] Lock Status
and Mute section), so a mute only occurs on a loss of lock.
In the case of the ADAU1446, setting this register does not
affect system operation in any way.
ASRC[7:4] Lock Status and Mute Register (Address 0xE141)
Table 37. Bit Descriptions of Register 0xE141
Bit
Position
[15:12]
[11]
[10]
[9]
[8]
[7:4]
[3]
[2]
[1]
[0]
Every sample rate converter pair for ASRCs[7:4] can be muted.
This function is controlled by a single 12-bit register. The mute
bits (Bits[3:0]) are active high, so a value of 1 mutes the corre­
sponding ASRC, and a value of 0 unmutes the corresponding ASRC.
If the ASRC cannot find the ratio between the input and output
clock, the lock status bits (Bits[11:8]) are each set to 0, and the
ASRC automatically mutes itself. An ASRC mute can also be
manually initiated by setting the corresponding bit (Bits[3:0]) to
1. The muting is done with a volume ramp and is click and pop
free. If desired, the mute ramp can be disabled for ASRC[7:4] (see
the ASRC[7:4] Mute Ramp Disable Register (Address 0xE143)
section).
Description
Reserved
ASRC[3:0] (Channels[7:0]) mute ramp disable
0 = enable ramp
1 = disable ramp
Description
Reserved
ASRC 7 (Channel 14, Channel 15)
lock status (read only)
ASRC 6 (Channel 12, Channel 13)
lock status (read only)
ASRC 5 (Channel 10, Channel 11)
lock status (read only)
ASRC 4 (Channel 8, Channel 9)
lock status (read only)
Reserved
ASRC 7 (Channel 14, Channel 15) mute
ASRC 6 (Channel 12, Channel 13) mute
ASRC 5 (Channel 10, Channel 11) mute
ASRC 4 (Channel 8, Channel 9) mute
Default
0
Default
0
0
0
0
0
0
0
0