adau1442 Analog Devices, Inc., adau1442 Datasheet - Page 71

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adau1442

Manufacturer Part Number
adau1442
Description
Sigmadsp Digital Audio Processor With Flexible Audio Routing Matrix
Manufacturer
Analog Devices, Inc.
Datasheet

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[3]
[2]
[1]
[0]
Frame Clock Pad Strength Register (Address 0xE248)
This register controls the pad drive strength of all frame clock pins configured in master mode. The default 2 mA setting should be
adequate for most applications. The 6 mA setting should be used only when the integrity of the signal is compromised.
Table 68. Bit Descriptions of Frame Clock Pad Strength Register
Bit Position
[15:12]
[11]
[10]
[9]
[8]
[7]
[6]
[5]
[4]
Description
Reserved
LRCLK11
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK10
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK9
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK8
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK7
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK6
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK5
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK4
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK3
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK2
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK1
0 = low strength (2 mA)
1 = high strength (6 mA)
LRCLK0
0 = low strength (2 mA)
1 = high strength (6 mA)
Rev. PrA| Page 71 of 92
Default
0
0
0
0
0
0
0
0
0
0
0
0

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