adau1442 Analog Devices, Inc., adau1442 Datasheet - Page 62

• Manufacturer Part Number: adau1442
• Description: Sigmadsp Digital Audio Processor With Flexible Audio Routing Matrix
• Manufacturer: Analog Devices, Inc.

Watchdog Modes and Settings
Watchdog Registers (Address 0xE210 to Address 0xE212)
Table 42. Register Details of Watchdog Registers
Decimal
57872
57873
57874
A program counter watchdog is used when the core performs
block processing (which can span several samples). The
watchdog flags an error if the program counter reaches the 32­
bit value set in the watchdog value registers. This value consists
of two consecutive 16-bit register locations. The error flag sends
a high signal to one of the multipurpose pins. The watchdog
function must be enabled by setting the single-bit register at
Location 57872 high.
The register configuration for the watchdog counter is as
follows:
•
•
•
Watchdog Error Sticky Register (Address 0xE226)
Table 43. Bit Descriptions of Register 0xE226
Bit Position
[15:1]
[0]
Watchdog enable is a 1-bit enable.
Watchdog Value 1 is the 16 MSBs of the watchdog
maximum count value.
Watchdog Value 2 is the 16 LSBs of the watchdog
maximum count value.
Address
Hex
E210
E211
E212
Description
Reserved
Watchdog error sticky (read only)
Register
Watchdog enable
Watchdog Value 1
Watchdog Value 2
Function
1-bit enable register for watchdog timer
16 MSBs of the watchdog maximum count value
16 LSBs of the watchdog maximum count value
Default
0
Rev. PrA | Page 62 of 92
This single-bit watchdog error flag goes high when an error occurs.
It can optionally be sent to an MP pin, as described in the
Multipurpose Pin Control Registers (Address 0xE204 to
Address 0xE20F) section. For example, the error flag can
connect to an interrupt pin on a microcontroller in the system.
It resets to 0 when the watchdog enable is reset to 0.
CRC and Watchdog Mute Register (Address 0xE227)
Table 44. Bit Descriptions of Register 0xE227
Bit
Position
[15:2]
[1]
[0]
This 2-bit register causes a CRC or watchdog error to
automatically mute the core. The default value is off.
Description
Reserved
A CRC error mutes the core
automatically
A watchdog error mutes the core
automatically
0
0
0
Default
Default
0
0