peb2035 ETC-unknow, peb2035 Datasheet - Page 5

• Manufacturer Part Number: peb2035
• Description: Communications Advanced Cmos Frame Aligner
• Manufacturer: ETC-unknow

Microprocessor Interface
General
1.1
The Advanced CMOS Frame Aligner PEB 2035 (ACFA) is a monolithic CMOS device which
implements the interface to primary rate PCM carriers. It may be programmed to operate in 24-
channel (T1) and 32-channel (CEPT) carrier systems.
The ACFA features include: selectable multiframe (six multiframe formats), error checking (CRC4,
CRC6), multiple line codes (HDB3, B8ZS, AMI), and programmable signaling paths. The device
includes functions which meet newest CCITT (Blue Book) and FTZ recommendations for primary
rate interfaces and the AT&T Digital Multiplexed Interface specifications (DMI) plus some additional
features requested by the market. Controlling and monitoring of the device is performed via a
parallel eight-bit microprocessor bus.
The circuit contains a two-frame elastic memory which ensures wander absorption between the
PCM carrier and a synchronous, system internal highway.
All signaling types - CCS, CAS and bit-robbed signaling in conjunction with Clear Channel
Capability - are supported by the ACFA. In addition, the ACFA allows flexible access to facility data
link and service channels. Extensive testing capabilities are included.
The ACFA is suitable for a wide range of voice and data applications. Below you find a list of
equipment as described by the CCITT which potential ACFA applications.
2048 kbit/s Applications
– PCM Multiplex equipment according to G.732, G.735, G.738.
– Digital Multiplex equipment according to G.736
– Digital Multiplex equipment according G.742, G745
– External Access equipment according to G.737, G.739
– Digital Exchange equipment according to G.705, Q.511, Q512
– Transmultiplex equipment according to G.793
Semiconductor Group
Parallel, demultiplexed microprocessor interface for random access to control and status
registers
Alarm interrupt capabilities
Access to different signaling information:
– S
– S
– FDL bits with the possibility of mixed insertion
– CCS, CAS-CC (common channel), CAS-BR (bit robbing) via 2/3-byte stacks with DMA/
Extensive test and diagnostic capabilities
Advanced CMOS technology
Low power consumption (< 100 mW)
Packaging: P-DIP-40, P-LCC-44
interrupt support
a
a
Introduction
-, E, S
-bits (5-byte stack)
i
-bits (register)
5
PEB 2035