mt90226ag ETC-unknow, mt90226ag Datasheet - Page 2

• Manufacturer Part Number: mt90226ag
• Description: 16/8 Port Tc Phy Device
• Manufacturer: ETC-unknow

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Applications
Provides cost effective solutions to implement TC (Transmission Convergence) functions over T1, E1, J1 or DSL
transport facilities in broadband access networks. Typical applications are for trunking or subscriber access in:
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Overview
The MT90226 and MT90225 form a family of similar devices, differing only in the maximum number of serial links,
and are collectively referred to as MT90225/226. It should be noted throughout this document whenever reference
is made to the number of serial links that the MT90225 offers a maximum of 16 serial links (links 15:0), while the
MT90226 offers a maximum of 8 serial links (links 14,12,10,8,6,4,2 and 0). Pin and register compatibility has been
maintained to offer interchangeability.
Description
The MT90225/226 device is targeted to systems implementing TC or UNI (User Network Interface) specifications
for T1/E1 rates or DSL rates. In the MT90225/226 architecture, up to 16/8 physical and independent serial links can
be terminated through the utilization of off-the-shelf, traditional T1/E1/J1 framers/LIUs and DSL chip sets.
The MT90225/226 device provides ATM system designers with a flexible architecture when implementing ATM
access over existing trunk interfaces, allowing a migration towards ATM service technology. The MT90225/226 is
compliant with ATM TC/UNI specifications for T1/E1 rates. The MT90225/226 can be configured to operate in
different TDM modes to facilitate the implementation of ATM over T1/E1/DSL at both CPE and Central Office sites.
The device allows for bandwidth scaleability through the use of the UTOPIA MPHY, Level 1 and Level 2 specification
at rates up to 52Mhz.
Main functions that are implemented in the MT90225/226 device are:
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Integrated multi-service access platforms
Access multiplexers
Next-generation DLCs
Wireless local loop
3G wireless base-stations
Utopia Level 1 or 2 PHY Interface
Incoming HEC verification and correction (optional),
Generation of a new HEC byte
Format outgoing bytes into multi-vendor TDM formats
Retrieve ATM Cells from the incoming multi-vendor TDM format
Perform cell delineation
Provide various counters to assist in performance monitoring
Generation and insertion of Idle Cells; The Idle cells are pre-defined.
Provide structured Interrupt scheme to report various events
16-bit microprocessor interface (adaptable to Intel or Motorola interfaces)
loopbacks
Zarlink Semiconductor Inc.
Data Sheet