mt90226ag ETC-unknow, mt90226ag Datasheet - Page 28
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mt90226ag
Manufacturer Part Number
mt90226ag
Description
16/8 Port Tc Phy Device
Manufacturer
ETC-unknow
Datasheet
1.MT90226AG.pdf
(91 pages)
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28
After correction (when enabled), the resulting ATM cell is passed to the Rx Link UTOPIA FIFO.
If a single or multi bit error occurs, the state machine transitions to the ’detection’ state. When a cell with a good HEC
is detected, the state machine returns to the ’correction’ state. The HEC calculation normally includes the ATM
FORUM polynomial (X
Link Control (0x00C0-0x00C7) register.
3.1.1
When a serial TDM stream is used with a sync signal such as a TDM Frame Pulse, byte alignment is guaranteed.
As a result, the hunt algorithm searches for the cell boundary based on a predefined number of bytes. If it fails, the
hunt algorithm shifts one byte and tries again.
3.1.2
When a serial TDM stream is used without a sync signal (e.g. in non-framed mode), byte alignment is not
guaranteed. The hunt algorithm searches for the cell boundary based on a predefined number of bytes. If it fails, the
hunt algorithm shifts one bit and tries again. When the hunt algorithm succeeds, it will have determined both the cell
boundary and the byte alignment. This mode of operation is selected by setting bit 10 of TDM RX Link Control
(0x0700-0x070F) register.
3.2
The CD circuit can de-scramble the cell payload field. The de-scrambling algorithm can be enabled or disabled using
bit 5 or 13 of the RX Link Control (0x00C0-0x00C7) registers.
The MT90225/226 can be programmed, using the RX Link Control (0x00C0-0x00C7) registers, to discard received
ATM cells with HEC errors using bits 2 and 10.
HEC error correction is optional and can be enabled by the CPU. When the option to correct an incoming HEC value
with 1 bit error is selected, the HEC is corrected and the cell is not counted as a cell with a bad HEC. If the option
to remove the cells that are received with a bad HEC is selected, then the incoming cells are discarded. The counter
is not incremented if the HEC value is corrected, when the option is enabled.
Incoming Idle and Unassigned cells can be detected and dropped automatically.
Cell Delineation with Sync signal
Cell Delineation without Sync signal
De-Scrambling and ATM Cell Filtering
6
+ X
4
+ X
2
+ 1). The use of the polynomial can be disabled by writing to bit 1 or 9 of the RX
Zarlink Semiconductor Inc.
Data Sheet
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