mt90226ag ETC-unknow, mt90226ag Datasheet - Page 35

• Manufacturer Part Number: mt90226ag
• Description: 16/8 Port Tc Phy Device
• Manufacturer: ETC-unknow

Data Sheet
4.4.3
If a serial link of more than 5Mbps but less than 10.0Mbps data rate is required, this mode can be applied. For every
four links in a group, three are disabled and the other is able to run from 0 up to 10.0Mbps. The four links that can
be grouped are pre-determined: link 0,1, 2, 3 are one group; link 4, 5, 6, 7 are one group and so on. The link that
will remain enabled in each group is also pre-determined. They are link 0, 4, 8 and 12.
For the group of link 0, 1, 2 and 3, the pins associated with link 1, 2 and 3 cannot be used and are tri-stated. On the
transmit side of link 0, if the TXCK and TCSYNC are programmed as inputs, TXSYNC must be de-asserted, and
the transmitter will be "free running" and will output serial data continuously. If the TXSYNC is defined as output, a
frame pulse is generated for every 1024 TXCK cycles, but can be ignored. The same logic applies for the other
groups.
For any disabled link, its associated registers are all disabled, except for mapping registers that must be set to all
one. No other configuration is necessary for disabled links.
This mode is selected in TDM TX Link Control (0x0600-0x060F) and TDM RX Link Control (0x0700-0x070F) by
writing the following settings into those enabled links only.
4.5
In any framed modes, the Frame signal format can be one of two options. It can be of a generic format (active high
or low during the first bit of the frame) or ST-BUS format (active low at the boundary of the frame). In the generic
modes, the clock polarity can be selected to have a rising or falling edge at the bit boundary.
The TXCK and TXSYNC signals can be either outputs or inputs except for Multiplex mode.
4.6
Two loopback modes are provided where the TDM RX inputs are internally routed back to the TDM TX outputs
(remote loopback) with the RX block fully operational, and where the TDM TX outputs are routed back to the TDM
RX inputs for test purposes (metallic loopback). The TX and RX links have to be programmed in the same mode for
the loopback to operate properly. Bit 8 of the TDM TX Link Control Register (0x0600-0x060F) controls the remote
loopback and bit 8 of the TDM RX Link Control (0x0700-0x070F) register controls the metallic loopback.
To use remote loopback, TXCK and TXSYNC must be configured as output sourcing from the RXCK and RXSYNC
of the same port. The loopback is on a per link basis with the limitation that physical links are paired: i.e. TX link 0
is connected to RX link 0 and so on.
Besides TDM loopacks, there is also a UTOPIA loopback described in the section 5.7.
Data rate (bits 6:5) = 11
Multiplex mode (bits 4:3) = 00
Clock and Sync format (bit 2) = 0
Cell delineation mode (bit 10 of TDM RX Link Control only) = 1
Non-framed mode - 10.0Mbps
Clock formats
TDM Loopback Mode
Zarlink Semiconductor Inc.
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