mt90528ag2 Zarlink Semiconductor, mt90528ag2 Datasheet - Page 121

• Manufacturer Part Number: mt90528ag2
• Description: 28-port Primary Rate Circuit Emulation Aal1 Sar
• Manufacturer: Zarlink Semiconductor

Port 12
Port 13
Port 14
Port 15
Port 16
Port 17
Port 18
Address
Byte
Hex
52B8
52C0
52C2
52C4
52C6
52C8
52D0
52D2
52D4
52D6
52D8
52E0
52E2
52E4
52E6
52E8
52F0
52F2
52F4
52F6
52F8
5300
5302
5304
5306
5308
5310
5312
5314
5316
5318
5320
5322
5324
Reset
Value
0001
0000
8000
0000
0000
0001
0000
8000
0000
0000
0001
0000
8000
0000
0000
0001
0000
8000
0000
0000
0001
0000
8000
0000
0000
0001
0000
8000
0000
0000
0001
0000
8000
0000
CSFSR_P12
CSFSR_P13
CSFSR_P14
CSFSR_P15
CSFSR_P16
CSFSR_P17
PLLEN_P11
PLLEN_P12
PLLEN_P13
PLLEN_P14
PLLEN_P15
PLLEN_P16
PLLEN_P17
CDDR_P12
CDDR_P13
CDDR_P14
CDDR_P15
CDDR_P16
CDDR_P17
CDDR_P18
CPAR_P12
CPAR_P13
CPAR_P14
CPAR_P15
CPAR_P16
CPAR_P17
CPAR_P18
CCR_P12
CCR_P13
CCR_P14
CCR_P15
CCR_P16
CCR_P17
CCR_P18
Label
Table 26 - Register Summary
PLL Enable Register
Clocking Configuration Register
Clocking Phase Accumulator Register
Clocking DCO Difference Register
SRTS FIFO Status Register
PLL Enable Register
Clocking Configuration Register
Clocking Phase Accumulator Register
Clocking DCO Difference Register
SRTS FIFO Status Register
PLL Enable Register
Clocking Configuration Register
Clocking Phase Accumulator Register
Clocking DCO Difference Register
SRTS FIFO Status Register
PLL Enable Register
Clocking Configuration Register
Clocking Phase Accumulator Register
Clocking DCO Difference Register
SRTS FIFO Status Register
PLL Enable Register
Clocking Configuration Register
Clocking Phase Accumulator Register
Clocking DCO Difference Register
SRTS FIFO Status Register
PLL Enable Register
Clocking Configuration Register
Clocking Phase Accumulator Register
Clocking DCO Difference Register
SRTS FIFO Status Register
PLL Enable Register
Clocking Configuration Register
Clocking Phase Accumulator Register
Clocking DCO Difference Register
Zarlink Semiconductor Inc.
MT90528
121
Description
Data Sheet