mt90528ag2 Zarlink Semiconductor, mt90528ag2 Datasheet - Page 141

• Manufacturer Part Number: mt90528ag2
• Description: 28-port Primary Rate Circuit Emulation Aal1 Sar
• Manufacturer: Zarlink Semiconductor

6.2.6
Address: 3000 (Hex)
Label: MTCR
Reset Value: 09C4 (Hex)
Address: 3002 (Hex)
Label: MTSR1
Reset Value: 0000 (Hex)
STATUS_10
STATUS_11
STATUS_12
STATUS_13
STATUS_14
STATUS_15
STATUS_0
STATUS_1
STATUS_2
STATUS_3
STATUS_4
STATUS_5
STATUS_6
STATUS_7
STATUS_8
STATUS_9
_PERIOD
CUT_VC
Label
Label
Reassembly-Side Timeout Module
Position
Position
15:0
Bit
Bit
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
Table 57 - MIB Timeout Configuration Register
Type
Type
R/W
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
Table 58 - MIB Timeout Status Register 1
Reassembly Cell Loss Integration Period.
If cells on a VC are continuously lost for this period of time (given in ms), the
CUT_VC_STATUS bit is set in the Timeout Configuration Register (3200h + p*2h) corre-
sponding to the VC’s “VC TDM Port”. Default value = 2.5 s.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 0.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 1.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 2.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 3.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 4.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 5.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 6.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 7.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 8.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 9.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 10.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 11.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 12.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 13.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 14.
If set, indicates that either an unmasked late cell event or an unmasked cut VC event has
occurred on port 15.
Zarlink Semiconductor Inc.
MT90528
141
Description
Description
Data Sheet