mt90528ag2 Zarlink Semiconductor, mt90528ag2 Datasheet - Page 190

• Manufacturer Part Number: mt90528ag2
• Description: 28-port Primary Rate Circuit Emulation Aal1 Sar
• Manufacturer: Zarlink Semiconductor

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Note: Telcordia (formerly Bellcore) asserts that its U.S. Patent No. 5,260,978 for Synchronous Residual Timestamp
(SRTS) Timing Recovery in a Broadband Network may apply to the ATM Adaptation Layer Type 1 (AAL1) ANSI
Standard (T1.630-1993) referenced in Section 3.4 of af-vtoa-0078.000.
ITU-T Rec. I.363.1, “B-ISDN ATM Adaptation Layer Specification: Type 1 AAL,” Aug. 1996.
ATM Forum af-vtoa-0078.000, “Circuit Emulation Service Interoperability Specification Version 2.0,” Jan.
1997.
ATM Forum, af-vtoa-0089.001, “ATM Trunking using AAL1 for Narrowband Services Version 1.1,” Feb. 2000.
ITU-T I.361, “B-ISDN ATM Layer Specification,” Nov. 1995.
ITU-T I.362, “B-ISDN ATM Adaptation Layer (AAL) Functional Description,” Mar. 1993.
IEEE Std. 1149.1a-1993, “IEEE Standard Test Access Port and Boundary Scan Architecture.”
ATM Forum af-phy-0017.000, “UTOPIA, An ATM-PHY Interface Specification: Level 1, Version 2.01,” Mar.
1994.
ATM Forum af-phy-0039.000, “Utopia Level 2, Version 1.0,” June 1995.
ITU-T G.823, “The Control of Jitter and Wander within Digital Networks which are based on the 2048 kbit/s
Hierarchy,” Mar. 1993.
ITU-T G.824, “The Control of Jitter and Wander within Digital Networks which are based on the 1544 kbit/s
Hierarchy,” Mar. 1993.
ANSI T1.102, “Telecommunications - Digital Hierarchy - Electrical Interfaces,” 1993.
ANSI T1.403, “Telecommunications - Network and Customer Installation Interfaces - DS1 Electrical Interface
Informative Standards and References,” 1995.
ANSI T1.630 -1993, “Broadband ISDN - ATM Adaptation Layer for Constant Bit Rate Services Functionality
and Specification,” Aug. 1993.
ETSI Std. ETS 300 353, “B-ISDN; ATM Adaptation Layer (AAL) specification - type1,” Dec. 1996 (2nd Ed,
Draft)
Telcordia GR-1113-CORE, Issue 1, July, 1994, Asynchronous Transfer Mode (ATM) and ATM Adaptation
Layer (AAL) Protocols.
MSAN-163, “Multitrunk System Synchronizer”, Issue 1, Zarlink Application Note for the MT9042 PLL,
December 1996.
M. Noorchasm et al., “Buffer Design for Constant Bit Rate Services in Presence of Cell Delay Variation,”
ATM Forum Contribution 95-1454.
Paul E. Fleischer and Chi-Leung Lau, “Synchronous Residual Time Stamp for Timing Recovery in a
Broadband Network,” United States Patent 5,260,978, Nov. 1993.
Normative Standards
Informative Standards
Reference Documents
Zarlink Semiconductor Inc.
MT90528
190
Data Sheet